> 1. The placement of subreg in > > (plus:DI (subreg:DI (mult:SI (reg/v:SI 85 [ i ]) > (const_int 4 [0x4])) 0) > (subreg:DI (reg:SI 106) 0)) > > isn't supported by x86 backend.
That's easy to fix. > 2. The biggest problem is optimizing mask 0xffffffff to > 0xfffffffc by keeping track of non-zero bits in registers. > X86 backend doesn't have such information to know > ADDR & 0xfffffffc == ADDR & 0xffffffff. But this indeed isn't. I withdraw my comment. I still don't like the patch, but I'm no longer as familiar with the code as I used to be so can't suggest a replacement. Let's see what others think about it.
