On 01/08/2018 07:23 AM, Alan Modra wrote: > On Sun, Jan 07, 2018 at 04:36:20PM -0700, Jeff Law wrote: >> On 01/07/2018 03:58 PM, H.J. Lu wrote: >>> This set of patches for GCC 8 mitigates variant #2 of the speculative >>> execution >>> vulnerabilities on x86 processors identified by CVE-2017-5715, aka Spectre. > [snip] >> My fundamental problem with this patchkit is that it is 100% x86/x86_64 >> specific. > > It's possible that x86 needs spectre variant 2 mitigation that isn't > necessary on other modern processors like ARM and PowerPC, so let's > not rush into general solutions designed around x86.. >From what I know about variant 2 mitigation it's going to be needed on a variety of chip families, not just the Intel architecture.
However, I'm seeing signals that other chips vendors are looking towards approaches that don't use retpolines. So even though I think we could build them fairly easy for most targets out of simple primitives, it may not be the best use of our time. > > Here's a quick overview of Spectre. For more, see > https://spectreattack.com/spectre.pdf > https://googleprojectzero.blogspot.com.au/2018/01/reading-privileged-memory-with-side.html > https://developer.arm.com/-/media/Files/pdf/Cache_Speculation_Side-channels.pdf Yup. Already familiar with this stuff :-) > > However, x86 has the additional problem of variable length > instructions. Gadgets might be hiding in code when executed at an > offset from the start of the "real" instructions. Which is why x86 is > more at risk from this attack than other processors, and why x86 needs > something like the posted variant 2 mitigation, slowing down all > indirect branches. > True, but largely beside the point. I'm not aware of anyone serious looking at mating ROP with Spectre at this point, though it is certainly possible. The bad guys don't need to work that hard at this time. Jeff
