On Wed, 14 Nov 2018 15:41:00 +0000 Jozef Lawrynowicz <joze...@mittosystems.com> wrote:
> Patch 1 tweaks dg directives in tests specifically for msp430. Many of > these are extensions to existing target selectors in dg directives. Made some modifications to patch 1 based on suggestions. Added int_eq_float and ptr_eq_long effective target procedures. Re-tested on avr, x86_64-pc-linux-gnu and msp430-elf. Ok for trunk?
>From 1f31a27ab7cf5b7de0c1cfc7e33a39a66cd61146 Mon Sep 17 00:00:00 2001 From: Jozef Lawrynowicz <joze...@mittosystems.com> Date: Thu, 8 Nov 2018 18:55:57 +0000 Subject: [PATCH] [TESTSUITE][MSP430] Tweak dg-directives for msp430-elf 2018-11-21 Jozef Lawrynowicz <joze...@mittosystems.com> gcc/testsuite/ChangeLog: * lib/target-supports.exp (check_effective_target_logical_op_short_circuit): Add msp430. (check_effective_target_int_eq_float): New. (check_effective_target_ptr_eq_long): New. * c-c++-common/pr41779.c: Require int_eq_float for dg-warning tests. * c-c++-common/pr57371-2.c: XFAIL optimized dump scan when sizeof (float) != sizeof (int). * gcc.dg/pr84670-4.c: Require ptr_eq_long. * gcc.dg/pr85859.c: Likewise. * gcc.dg/Wno-frame-address.c: Skip for msp430-elf. * gcc.dg/torture/stackalign/builtin-apply-2.c: Likewise. * gcc.dg/ifcvt-4.c: Likewise. * gcc.dg/pr34856.c: Likewise. * gcc.dg/builtin-apply2.c: Likewise. * gcc.dg/tree-ssa/ssa-dse-26.c: Likewise. * gcc.dg/attr-alloc_size-11.c: Remove dg-warning XFAIL for msp430. * gcc.dg/tree-ssa/20040204-1.c: Likewise. * gcc.dg/compat/struct-by-value-16a_x.c: Build at -O1 for msp430 so it fits. * gcc.dg/lto/20091013-1_0.c: Require ptr_eq_long. * gcc.dg/lto/20091013-1_1.c: Remove xfail-if for when sizeof(void *) != sizeof(long). * gcc.dg/lto/20091013-1_2.c: Likewise. * gcc.dg/tree-ssa/loop-1.c: Fix expected dg-final behaviour for msp430. * gcc.dg/tree-ssa/gen-vect-25.c: Likewise. * gcc.dg/tree-ssa/gen-vect-11.c: Likewise. * gcc.dg/tree-ssa/loop-35.c: Likewise. * gcc.dg/tree-ssa/pr23455.c: Likewise. * gcc.dg/weak/typeof-2.c: Likewise. * gcc.target/msp430/interrupt_fn_placement.c: Skip for 430 ISA. * gcc.target/msp430/pr78818-data-region.c: Fix scan-assembler text. * gcc.target/msp430/pr79242.c: Don't skip for -msmall. * gcc.target/msp430/special-regs.c: Use "__asm__" instead of "asm". --- gcc/testsuite/c-c++-common/pr41779.c | 6 +++--- gcc/testsuite/c-c++-common/pr57371-2.c | 2 +- gcc/testsuite/gcc.dg/Wno-frame-address.c | 2 +- gcc/testsuite/gcc.dg/attr-alloc_size-11.c | 4 ++-- gcc/testsuite/gcc.dg/builtin-apply2.c | 2 +- .../gcc.dg/compat/struct-by-value-16a_x.c | 2 ++ gcc/testsuite/gcc.dg/ifcvt-4.c | 2 +- gcc/testsuite/gcc.dg/lto/20091013-1_0.c | 1 + gcc/testsuite/gcc.dg/lto/20091013-1_1.c | 1 - gcc/testsuite/gcc.dg/lto/20091013-1_2.c | 1 - gcc/testsuite/gcc.dg/pr34856.c | 1 + gcc/testsuite/gcc.dg/pr84670-4.c | 1 + gcc/testsuite/gcc.dg/pr85859.c | 1 + .../gcc.dg/torture/stackalign/builtin-apply-2.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c | 4 ++-- gcc/testsuite/gcc.dg/tree-ssa/loop-1.c | 4 ++-- gcc/testsuite/gcc.dg/tree-ssa/loop-35.c | 4 ++-- gcc/testsuite/gcc.dg/tree-ssa/pr23455.c | 4 ++-- gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-26.c | 1 + gcc/testsuite/gcc.dg/weak/typeof-2.c | 2 ++ .../gcc.target/msp430/interrupt_fn_placement.c | 1 + .../gcc.target/msp430/pr78818-data-region.c | 3 ++- gcc/testsuite/gcc.target/msp430/pr79242.c | 2 +- gcc/testsuite/gcc.target/msp430/special-regs.c | 8 ++++---- gcc/testsuite/lib/target-supports.exp | 24 ++++++++++++++++++++++ 27 files changed, 61 insertions(+), 28 deletions(-) diff --git a/gcc/testsuite/c-c++-common/pr41779.c b/gcc/testsuite/c-c++-common/pr41779.c index c42a0f5..a80bf78 100644 --- a/gcc/testsuite/c-c++-common/pr41779.c +++ b/gcc/testsuite/c-c++-common/pr41779.c @@ -1,6 +1,6 @@ /* PR41779: Wconversion cannot see through real*integer promotions. */ /* { dg-do compile } */ -/* { dg-skip-if "doubles are floats" { "avr-*-*" } } */ +/* { dg-skip-if "doubles are floats" { avr-*-* } } */ /* { dg-options "-std=c99 -Wconversion" { target c } } */ /* { dg-options "-Wconversion" { target c++ } } */ /* { dg-require-effective-target large_double } */ @@ -27,7 +27,7 @@ float f4(float x, unsigned char y) float f5(float x, int y) { - return x * y; /* { dg-warning "conversion" } */ + return x * y; /* { dg-warning "conversion" "" { target int_eq_float } } */ } double c1(float x, unsigned short y, int z) @@ -52,5 +52,5 @@ double c4(float x, unsigned char y, int z) double c5(float x, int y, int z) { - return z ? x + x : y; /* { dg-warning "conversion" } */ + return z ? x + x : y; /* { dg-warning "conversion" "" { target int_eq_float } } */ } diff --git a/gcc/testsuite/c-c++-common/pr57371-2.c b/gcc/testsuite/c-c++-common/pr57371-2.c index d07cff3..8d11880 100644 --- a/gcc/testsuite/c-c++-common/pr57371-2.c +++ b/gcc/testsuite/c-c++-common/pr57371-2.c @@ -8,7 +8,7 @@ int foo1(int x) { return (float) x != 0; - /* { dg-final { scan-tree-dump "\\(float\\)" "optimized" } } */ + /* { dg-final { scan-tree-dump "\\(float\\)" "optimized" { xfail { ! int_eq_float } } } } */ } int foo2(long long x) { diff --git a/gcc/testsuite/gcc.dg/Wno-frame-address.c b/gcc/testsuite/gcc.dg/Wno-frame-address.c index 9fe4d07..11ae0cd 100644 --- a/gcc/testsuite/gcc.dg/Wno-frame-address.c +++ b/gcc/testsuite/gcc.dg/Wno-frame-address.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "Cannot access arbitrary stack frames" { arm*-*-* avr-*-* hppa*-*-* ia64-*-* visium-*-* csky-*-* } } */ +/* { dg-skip-if "Cannot access arbitrary stack frames" { arm*-*-* avr-*-* hppa*-*-* ia64-*-* visium-*-* csky-*-* msp430-*-* } } */ /* { dg-options "-Werror" } */ /* { dg-additional-options "-mbackchain" { target { s390*-*-* } } } */ diff --git a/gcc/testsuite/gcc.dg/attr-alloc_size-11.c b/gcc/testsuite/gcc.dg/attr-alloc_size-11.c index 7f2fc49..0ac787c 100644 --- a/gcc/testsuite/gcc.dg/attr-alloc_size-11.c +++ b/gcc/testsuite/gcc.dg/attr-alloc_size-11.c @@ -47,8 +47,8 @@ typedef __SIZE_TYPE__ size_t; /* The following tests fail because of missing range information. The xfail exclusions are PR79356. */ -TEST (signed char, SCHAR_MIN + 2, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" "missing range info for signed char" { xfail { ! { aarch64*-*-* arm*-*-* avr-*-* alpha*-*-* ia64-*-* mips*-*-* pdp11*-*-* powerpc*-*-* sparc*-*-* s390*-*-* visium-*-* } } } } */ -TEST (short, SHRT_MIN + 2, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" "missing range info for short" { xfail { ! { aarch64*-*-* arm*-*-* alpha*-*-* avr-*-* ia64-*-* mips*-*-* pdp11*-*-* powerpc*-*-* sparc*-*-* s390x-*-* visium-*-* } } } } */ +TEST (signed char, SCHAR_MIN + 2, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" "missing range info for signed char" { xfail { ! { aarch64*-*-* arm*-*-* avr-*-* alpha*-*-* ia64-*-* mips*-*-* pdp11*-*-* powerpc*-*-* sparc*-*-* s390*-*-* visium-*-* msp430-*-* } } } } */ +TEST (short, SHRT_MIN + 2, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" "missing range info for short" { xfail { ! { aarch64*-*-* arm*-*-* alpha*-*-* avr-*-* ia64-*-* mips*-*-* pdp11*-*-* powerpc*-*-* sparc*-*-* s390x-*-* visium-*-* msp430-*-* } } } } */ TEST (int, INT_MIN + 2, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" } */ TEST (int, -3, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" } */ TEST (int, -2, ALLOC_MAX); /* { dg-warning "argument 1 range \\\[13, \[0-9\]+\\\] exceeds maximum object size 12" } */ diff --git a/gcc/testsuite/gcc.dg/builtin-apply2.c b/gcc/testsuite/gcc.dg/builtin-apply2.c index 3768caa..b73f946 100644 --- a/gcc/testsuite/gcc.dg/builtin-apply2.c +++ b/gcc/testsuite/gcc.dg/builtin-apply2.c @@ -1,7 +1,7 @@ /* { dg-do run } */ /* { dg-require-effective-target untyped_assembly } */ /* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "avr-*-* nds32*-*-*" } } */ -/* { dg-skip-if "Variadic funcs use different argument passing from normal funcs." { "riscv*-*-*" } } */ +/* { dg-skip-if "Variadic funcs use different argument passing from normal funcs." { "riscv*-*-*" msp430-*-* } } */ /* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { arm*-*-* && arm_hf_eabi } } */ /* PR target/12503 */ diff --git a/gcc/testsuite/gcc.dg/compat/struct-by-value-16a_x.c b/gcc/testsuite/gcc.dg/compat/struct-by-value-16a_x.c index f563f6e..ac8397b 100644 --- a/gcc/testsuite/gcc.dg/compat/struct-by-value-16a_x.c +++ b/gcc/testsuite/gcc.dg/compat/struct-by-value-16a_x.c @@ -1,3 +1,5 @@ +/* { dg-options "-O1" { target msp430-*-* } } */ + #include "compat-common.h" #include "fp-struct-defs.h" diff --git a/gcc/testsuite/gcc.dg/ifcvt-4.c b/gcc/testsuite/gcc.dg/ifcvt-4.c index 52827ab..ec142cf 100644 --- a/gcc/testsuite/gcc.dg/ifcvt-4.c +++ b/gcc/testsuite/gcc.dg/ifcvt-4.c @@ -2,7 +2,7 @@ /* { dg-additional-options "-misel" { target { powerpc*-*-* } } } */ /* { dg-additional-options "-march=z196" { target { s390x-*-* } } } */ /* { dg-additional-options "-mtune-ctrl=^one_if_conv_insn" { target { i?86-*-* x86_64-*-* } } } */ -/* { dg-skip-if "Multiple set if-conversion not guaranteed on all subtargets" { "arm*-*-* avr-*-* hppa*64*-*-* s390-*-* visium-*-*" riscv*-*-* } } */ +/* { dg-skip-if "Multiple set if-conversion not guaranteed on all subtargets" { "arm*-*-* avr-*-* hppa*64*-*-* s390-*-* visium-*-*" riscv*-*-* msp430-*-* } } */ /* { dg-skip-if "" { "s390x-*-*" } { "-m31" } } */ typedef int word __attribute__((mode(word))); diff --git a/gcc/testsuite/gcc.dg/lto/20091013-1_0.c b/gcc/testsuite/gcc.dg/lto/20091013-1_0.c index 9796770..afceb24 100644 --- a/gcc/testsuite/gcc.dg/lto/20091013-1_0.c +++ b/gcc/testsuite/gcc.dg/lto/20091013-1_0.c @@ -1,5 +1,6 @@ /* { dg-lto-do link } */ /* { dg-require-effective-target fpic } */ +/* { dg-require-effective-target ptr_eq_long } */ /* { dg-lto-options {{-fPIC -r -nostdlib -flto} {-fPIC -r -nostdlib -O2 -flto}} } */ /* { dg-extra-ld-options "-flinker-output=nolto-rel" } */ diff --git a/gcc/testsuite/gcc.dg/lto/20091013-1_1.c b/gcc/testsuite/gcc.dg/lto/20091013-1_1.c index c958177..fc74ff7 100644 --- a/gcc/testsuite/gcc.dg/lto/20091013-1_1.c +++ b/gcc/testsuite/gcc.dg/lto/20091013-1_1.c @@ -1,4 +1,3 @@ -/* { dg-xfail-if "cast to pointer of different size" { "avr-*-*" x86_64-*-mingw* } } */ typedef struct HDC__ { int unused; } *HDC; typedef struct HFONT__ { int unused; } *HFONT; diff --git a/gcc/testsuite/gcc.dg/lto/20091013-1_2.c b/gcc/testsuite/gcc.dg/lto/20091013-1_2.c index 94a4f72..1af49aa 100644 --- a/gcc/testsuite/gcc.dg/lto/20091013-1_2.c +++ b/gcc/testsuite/gcc.dg/lto/20091013-1_2.c @@ -1,4 +1,3 @@ -/* { dg-xfail-if "cast to pointer of different size" { "avr-*-*" x86_64-*-mingw* } } */ typedef struct HDC__ { int unused; } *HDC; typedef struct HFONT__ { int unused; } *HFONT; diff --git a/gcc/testsuite/gcc.dg/pr34856.c b/gcc/testsuite/gcc.dg/pr34856.c index 62041e2..9ae8902 100644 --- a/gcc/testsuite/gcc.dg/pr34856.c +++ b/gcc/testsuite/gcc.dg/pr34856.c @@ -2,6 +2,7 @@ /* { dg-options "-O2" } */ /* { dg-options "-O2 -msse2" { target { i?86-*-* x86_64-*-* } } } */ /* { dg-options "-O2 -maltivec" { target { powerpc*-*-linux* && powerpc_altivec_ok } } } */ +/* { dg-skip-if "no vector type for PSImode" { msp430-*-* } { "-mlarge" } { "" } } */ typedef __UINTPTR_TYPE__ uintptr_t; diff --git a/gcc/testsuite/gcc.dg/pr84670-4.c b/gcc/testsuite/gcc.dg/pr84670-4.c index 00bd13a..0360550 100644 --- a/gcc/testsuite/gcc.dg/pr84670-4.c +++ b/gcc/testsuite/gcc.dg/pr84670-4.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fwrapv" } */ +/* { dg-require-effective-target ptr_eq_long } */ char *a; int b(void) diff --git a/gcc/testsuite/gcc.dg/pr85859.c b/gcc/testsuite/gcc.dg/pr85859.c index 96eb967..b1476ba 100644 --- a/gcc/testsuite/gcc.dg/pr85859.c +++ b/gcc/testsuite/gcc.dg/pr85859.c @@ -1,5 +1,6 @@ /* { dg-do run } */ /* { dg-options "-ftree-tail-merge -Wno-div-by-zero -O2 -fno-dce -fno-isolate-erroneous-paths-dereference -fno-tree-dce -fno-tree-vrp" } */ +/* { dg-require-effective-target ptr_eq_long } */ int b, c, d, e; diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c index d033010..e7ffe66 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c @@ -9,7 +9,7 @@ /* arm_hf_eabi: Variadic funcs use Base AAPCS. Normal funcs use VFP variant. avr: Variadic funcs don't pass arguments in registers, while normal funcs do. */ -/* { dg-skip-if "Variadic funcs use different argument passing from normal funcs" { arm_hf_eabi || { avr-*-* riscv*-*-* } } } */ +/* { dg-skip-if "Variadic funcs use different argument passing from normal funcs" { arm_hf_eabi || { avr-*-* msp430-*-* riscv*-*-* } } } */ /* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { nds32*-*-* } } */ /* { dg-require-effective-target untyped_assembly } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c b/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c index a1237cf..66ca83f 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c @@ -33,4 +33,4 @@ void test55 (int x, int y) that the && should be emitted (based on BRANCH_COST). Fix this by teaching dom to look through && and register all components as true. */ -/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { ! "alpha*-*-* arm*-*-* aarch64*-*-* powerpc*-*-* cris-*-* crisv32-*-* hppa*-*-* i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* nds32*-*-* s390*-*-* sh*-*-* sparc*-*-* spu-*-* visium-*-* x86_64-*-* riscv*-*-*" } } } } */ +/* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { ! "alpha*-*-* arm*-*-* aarch64*-*-* powerpc*-*-* cris-*-* crisv32-*-* hppa*-*-* i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* nds32*-*-* s390*-*-* sh*-*-* sparc*-*-* spu-*-* visium-*-* x86_64-*-* riscv*-*-* msp430-*-*" } } } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11.c b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11.c index bb5f248..650e73a 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11.c @@ -30,4 +30,4 @@ int main () } -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! avr-*-* } } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! { avr-*-* msp430-*-* } } } } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c index 5e3ef8d..60ec270 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c @@ -54,5 +54,5 @@ int main (void) return main_1 (n + 2, (int *) &n); } -/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { target { ! avr-*-* } } } } */ -/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { target { ! avr-*-* } } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { target { ! { avr-*-* msp430-*-* } } } } } */ +/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { target { ! { avr-*-* msp430-*-* } } } } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-1.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-1.c index 1862750..6ac6202 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-1.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-1.c @@ -43,10 +43,10 @@ int xxx(void) /* The SH targets always use separate instructions to load the address and to do the actual call - bsr is only generated by link time relaxation. */ -/* CRIS keeps the address in a register. */ +/* CRIS and MSP430 keep the address in a register. */ /* m68k sometimes puts the address in a register, depending on CPU and PIC. */ -/* { dg-final { scan-assembler-times "foo" 5 { xfail hppa*-*-* ia64*-*-* sh*-*-* cris-*-* crisv32-*-* fido-*-* m68k-*-* i?86-*-mingw* i?86-*-cygwin* x86_64-*-mingw* visium-*-* nvptx*-*-* } } } */ +/* { dg-final { scan-assembler-times "foo" 5 { xfail hppa*-*-* ia64*-*-* sh*-*-* cris-*-* crisv32-*-* fido-*-* m68k-*-* i?86-*-mingw* i?86-*-cygwin* x86_64-*-mingw* visium-*-* nvptx*-*-* msp430-*-* } } } */ /* { dg-final { scan-assembler-times "foo,%r" 5 { target hppa*-*-* } } } */ /* { dg-final { scan-assembler-times "= foo" 5 { target ia64*-*-* } } } */ /* { dg-final { scan-assembler-times "call\[ \t\]*_foo" 5 { target i?86-*-mingw* i?86-*-cygwin* } } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-35.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-35.c index 4e9d03a..ce63f97 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-35.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-35.c @@ -67,5 +67,5 @@ void test4(struct a *A, unsigned LONG b) } } /* long index not hoisted for avr target PR 36561 */ -/* { dg-final { scan-tree-dump-times "Executing store motion of" 8 "lim2" { xfail { "avr-*-*" } } } } */ -/* { dg-final { scan-tree-dump-times "Executing store motion of" 6 "lim2" { target { "avr-*-*" } } } } */ +/* { dg-final { scan-tree-dump-times "Executing store motion of" 8 "lim2" { xfail { avr-*-* msp430-*-* } } } } */ +/* { dg-final { scan-tree-dump-times "Executing store motion of" 6 "lim2" { target { avr-*-* msp430-*-* } } } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr23455.c b/gcc/testsuite/gcc.dg/tree-ssa/pr23455.c index fec3540..f336c98 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/pr23455.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr23455.c @@ -25,5 +25,5 @@ bi_windup(unsigned int *outbuf, unsigned int bi_buf) /* We should eliminate one load of outcnt, which will in turn let us eliminate one multiply of outcnt which will in turn let us eliminate one add involving outcnt and outbuf. */ -/* { dg-final { scan-tree-dump-times "Eliminated: 3" 1 "pre" {target { ! avr-*-* } } } } */ -/* { dg-final { scan-tree-dump-times "Eliminated: 4" 1 "pre" {target { avr-*-* } } } } */ +/* { dg-final { scan-tree-dump-times "Eliminated: 3" 1 "pre" { target { ! { avr-*-* msp430-*-* } } } } } */ +/* { dg-final { scan-tree-dump-times "Eliminated: 4" 1 "pre" { target avr-*-* msp430-*-* } } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-26.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-26.c index 8e0a24a..32d6389 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-26.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-26.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fdump-tree-dse1-details -fno-short-enums" } */ +/* { dg-skip-if "temporary variable for constraint_expr is never used" { msp430-*-* } } */ enum constraint_expr_type { diff --git a/gcc/testsuite/gcc.dg/weak/typeof-2.c b/gcc/testsuite/gcc.dg/weak/typeof-2.c index d4273e3..51995ca 100644 --- a/gcc/testsuite/gcc.dg/weak/typeof-2.c +++ b/gcc/testsuite/gcc.dg/weak/typeof-2.c @@ -48,6 +48,8 @@ int bar3 (int x) // { dg-final { if [string match m68k-*-* $target_triplet ] {return} } } // Likewise for moxie targets. // { dg-final { if [string match moxie-*-* $target_triplet ] {return} } } +// Likewise for msp430 targets. +// { dg-final { if [string match msp430-*-* $target_triplet ] {return} } } // Likewise for Visium targets. // { dg-final { if [string match visium-*-* $target_triplet ] {return} } } // { dg-final { scan-assembler "baz3.*baz3.*baz3.*baz3.*baz3.*baz3" } } diff --git a/gcc/testsuite/gcc.target/msp430/interrupt_fn_placement.c b/gcc/testsuite/gcc.target/msp430/interrupt_fn_placement.c index c88bfc3..b8fd5e6 100644 --- a/gcc/testsuite/gcc.target/msp430/interrupt_fn_placement.c +++ b/gcc/testsuite/gcc.target/msp430/interrupt_fn_placement.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-skip-if "" { "*-*-*" } { "-mcpu=msp430" } { "" } } */ /* { dg-options "-mlarge -mcode-region=either -ffunction-sections" } */ /* { dg-final { scan-assembler-not "\\.either\\.lowtext" } } */ diff --git a/gcc/testsuite/gcc.target/msp430/pr78818-data-region.c b/gcc/testsuite/gcc.target/msp430/pr78818-data-region.c index 22b1fa2..3244c0a 100644 --- a/gcc/testsuite/gcc.target/msp430/pr78818-data-region.c +++ b/gcc/testsuite/gcc.target/msp430/pr78818-data-region.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mdata-region=either" } */ -/* { dg-final { scan-assembler-not "\\.either" } } */ +/* { dg-final { scan-assembler-not "\\.either\\.data" } } */ +/* { dg-final { scan-assembler-not "\\.either\\.bss" } } */ #include "pr78818-real.c" diff --git a/gcc/testsuite/gcc.target/msp430/pr79242.c b/gcc/testsuite/gcc.target/msp430/pr79242.c index d7ff8d3..9de8fe0 100644 --- a/gcc/testsuite/gcc.target/msp430/pr79242.c +++ b/gcc/testsuite/gcc.target/msp430/pr79242.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { "*-*-*" } { "-mcpu=msp430" "-msmall" } { "" } } */ +/* { dg-skip-if "" { "*-*-*" } { "-mcpu=msp430" } { "" } } */ /* { dg-options "-mcpu=msp430x" } */ typedef _Complex __int20 C; diff --git a/gcc/testsuite/gcc.target/msp430/special-regs.c b/gcc/testsuite/gcc.target/msp430/special-regs.c index c9121e6..a7ae9d0 100644 --- a/gcc/testsuite/gcc.target/msp430/special-regs.c +++ b/gcc/testsuite/gcc.target/msp430/special-regs.c @@ -7,10 +7,10 @@ int foo (void) register int cg1 __asm__("R2"); /* { dg-error "the register specified for 'cg1' is not general enough" } */ register int cg2 __asm__("R3"); /* { dg-error "the register specified for 'cg2' is not general enough" } */ - asm("" : "=r"(pc)); - asm("" : "=r"(sp)); - asm("" : "=r"(cg1)); - asm("" : "=r"(cg2)); + __asm__("" : "=r"(pc)); + __asm__("" : "=r"(sp)); + __asm__("" : "=r"(cg1)); + __asm__("" : "=r"(cg2)); return pc + sp + cg1 + cg2; } diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index fd74c04..0f34fb6 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -2651,6 +2651,29 @@ proc check_effective_target_long_neq_int { } { }] } +# Return 1 if int size is equal to float size, +# 0 otherwise. + +proc check_effective_target_int_eq_float { } { + return [check_no_compiler_messages int_eq_float object { + int dummy[sizeof (int) >= sizeof (float) ? 1 : -1]; + }] +} + +# Return 1 if pointer size is equal to long size, +# 0 otherwise. + +proc check_effective_target_ptr_eq_long { } { + # sizeof (void *) == 4 for msp430-elf -mlarge which is equal to + # sizeof (long). Avoid false positive. + if { [istarget msp430-*-*] } { + return 0 + } + return [check_no_compiler_messages ptr_eq_long object { + int dummy[sizeof (void *) == sizeof (long) ? 1 : -1]; + }] +} + # Return 1 if the target supports long double larger than double, # 0 otherwise. @@ -8388,6 +8411,7 @@ proc check_effective_target_logical_op_short_circuit {} { || [istarget crisv32-*-*] || [istarget cris-*-*] || [istarget csky*-*-*] || [istarget mmix-*-*] + || [istarget msp430-*-*] || [istarget s390*-*-*] || [istarget powerpc*-*-*] || [istarget nios2*-*-*] -- 2.7.4