On Mon, 2020-04-27 at 15:53 -0400, Michael Meissner via Gcc-patches wrote: > This patch adds a test that verifies that the compiler generates a prefixed > load/store instruction where the compiler cannot generate the instruction > directly because the offset is not a valid DS or DQ offset. A DS offset must > have the bottom 2 bits clear. A DQ offset must have the bottom 4 bits clear. > Due to the way PowerPC instructions are encoded, some instructions use the DS > format and some use the DQ format. > > This is patch #3 of 7. The tests in this patch run on a little endian power8 > system running Linux. > > 2020-04-27 Michael Meissner <meiss...@linux.ibm.com> > > * gcc.target/powerpc/prefix-ds-dq.c: New test to verify that we > generate the prefix load/store instructions for traditional > instructions with an offset that doesn't match DS/DQ > requirements.
Can probably safely be shortened to end at "... for traditional instructions." if not even just "New test". > > --- /tmp/dtFbYL_prefix-ds-dq.c 2020-04-27 13:54:38.350850944 -0400 > +++ gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c 2020-04-27 > 13:54:15.301160847 -0400 > @@ -0,0 +1,156 @@ > +/* { dg-do compile } */ > +/* { dg-require-effective-target powerpc_prefixed_addr } */ > +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ > + > +/* Tests whether we generate a prefixed load/store operation for addresses > that > + don't meet DS/DQ offset constraints. */ > + > +unsigned long > +load_uc_offset1 (unsigned char *p) > +{ > + return p[1]; /* should generate LBZ. */ > +} > + > +long > +load_sc_offset1 (signed char *p) > +{ > + return p[1]; /* should generate LBZ + EXTSB. > */ > +} OCD kicks in and says the above two (and a couple below) have an extra tab. nbd. :-) > + > +unsigned long > +load_us_offset1 (unsigned char *p) > +{ > + return *(unsigned short *)(p + 1); /* should generate LHZ. */ > +} > + > +long > +load_ss_offset1 (unsigned char *p) > +{ > + return *(short *)(p + 1); /* should generate LHA. */ > +} > + > +unsigned long > +load_ui_offset1 (unsigned char *p) > +{ > + return *(unsigned int *)(p + 1); /* should generate LWZ. */ > +} > + > +long > +load_si_offset1 (unsigned char *p) > +{ > + return *(int *)(p + 1); /* should generate PLWA. */ > +} > + > +unsigned long > +load_ul_offset1 (unsigned char *p) > +{ > + return *(unsigned long *)(p + 1); /* should generate PLD. */ > +} > + > +long > +load_sl_offset1 (unsigned char *p) > +{ > + return *(long *)(p + 1); /* should generate PLD. */ > +} > + > +float > +load_float_offset1 (unsigned char *p) > +{ > + return *(float *)(p + 1); /* should generate LFS. */ > +} > + > +double > +load_double_offset1 (unsigned char *p) > +{ > + return *(double *)(p + 1); /* should generate LFD. */ > +} > + > +__float128 > +load_float128_offset1 (unsigned char *p) > +{ > + return *(__float128 *)(p + 1); /* should generate PLXV. */ > +} > + > +void > +store_uc_offset1 (unsigned char uc, unsigned char *p) > +{ > + p[1] = uc; /* should generate STB. */ > +} > + > +void > +store_sc_offset1 (signed char sc, signed char *p) > +{ > + p[1] = sc; /* should generate STB. */ > +} > + > +void > +store_us_offset1 (unsigned short us, unsigned char *p) > +{ > + *(unsigned short *)(p + 1) = us; /* should generate STH. */ > +} > + > +void > +store_ss_offset1 (signed short ss, unsigned char *p) > +{ > + *(signed short *)(p + 1) = ss; /* should generate STH. */ > +} > + > +void > +store_ui_offset1 (unsigned int ui, unsigned char *p) > +{ > + *(unsigned int *)(p + 1) = ui; /* should generate STW. */ > +} > + > +void > +store_si_offset1 (signed int si, unsigned char *p) > +{ > + *(signed int *)(p + 1) = si; /* should generate STW. */ > +} > + > +void > +store_ul_offset1 (unsigned long ul, unsigned char *p) > +{ > + *(unsigned long *)(p + 1) = ul; /* should generate PSTD. */ > +} > + > +void > +store_sl_offset1 (signed long sl, unsigned char *p) > +{ > + *(signed long *)(p + 1) = sl; /* should generate PSTD. */ > +} > + > +void > +store_float_offset1 (float f, unsigned char *p) > +{ > + *(float *)(p + 1) = f; /* should generate STF. */ Comment should be STFD ? > +} > + > +void > +store_double_offset1 (double d, unsigned char *p) > +{ > + *(double *)(p + 1) = d; /* should generate STD. */ Comment should be STFS ? > +} > + > +void > +store_float128_offset1 (__float128 f128, unsigned char *p) > +{ > + *(__float128 *)(p + 1) = f128; /* should generate PSTXV. */ > +} > + > +/* { dg-final { scan-assembler-times {\mextsb\M} 1 } } */ > +/* { dg-final { scan-assembler-times {\mlbz\M} 2 } } */ > +/* { dg-final { scan-assembler-times {\mlfd\M} 1 } } */ > +/* { dg-final { scan-assembler-times {\mlfs\M} 1 } } */ > +/* { dg-final { scan-assembler-times {\mlha\M} 1 } } */ > +/* { dg-final { scan-assembler-times {\mlhz\M} 1 } } */ > +/* { dg-final { scan-assembler-times {\mlwz\M} 1 } } */ > +/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */ > +/* { dg-final { scan-assembler-times {\mplwa\M} 1 } } */ > +/* { dg-final { scan-assembler-times {\mplxv\M} 1 } } */ > +/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */ > +/* { dg-final { scan-assembler-times {\mpstxv\M} 1 } } */ > +/* { dg-final { scan-assembler-times {\mstb\M} 2 } } */ > +/* { dg-final { scan-assembler-times {\mstfd\M} 1 } } */ > +/* { dg-final { scan-assembler-times {\mstfs\M} 1 } } */ I wasn't able to matche these two up with the comments above. (see above). beyond those nits, lgtm. thanks, -Will > +/* { dg-final { scan-assembler-times {\msth\M} 2 } } */ > +/* { dg-final { scan-assembler-times {\mstw\M} 2 } } */ >