Hi Andre,
> -----Original Message-----
> From: Andre Vieira (lists) <andre.simoesdiasvie...@arm.com>
> Sent: Tuesday, October 12, 2021 5:42 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <kyrylo.tkac...@arm.com>; Christophe Lyon
> <christophe.l...@linaro.org>
> Subject: [arm] Fix MVE addressing modes for VLDR[BHW] and VSTR[BHW]
>
> Hi,
>
> The way we were previously dealing with addressing modes for MVE was
> preventing
> the use of pre, post and offset addressing modes for the normal loads and
> stores, including widening and narrowing. This patch fixes that and
> adds tests to ensure we are capable of using all the available addressing
> modes.
>
> gcc/ChangeLog:
> 2021-10-12 Andre Vieira <andre.simoesdiasvie...@arm.com>
>
> * config/arm/arm.c (thumb2_legitimate_address_p): Use
> VALID_MVE_MODE
> when checking mve addressing modes.
> (mve_vector_mem_operand): Fix the way we handle pre, post and
> offset
> addressing modes.
> (arm_print_operand): Fix printing of POST_ and PRE_MODIFY.
@@ -24276,7 +24271,7 @@ arm_print_operand (FILE *stream, rtx x, int code)
else if (code == POST_MODIFY || code == PRE_MODIFY)
{
asm_fprintf (stream, "[%r", REGNO (XEXP (addr, 0)));
- postinc_reg = XEXP ( XEXP (x, 1), 1);
+ postinc_reg = XEXP (XEXP (addr, 1), 1);
if (postinc_reg && CONST_INT_P (postinc_reg))
{
if (code == POST_MODIFY)
this looks like a bug fix that should be separately backported to the branches?
Otherwise, the patch looks ok for trunk to me.
Thanks,
Kyrill
> * config/arm/mve.md: Use mve_memory_operand predicate
> everywhere where
> there is a single Ux constraint.
>
> gcc/testsuite/ChangeLog:
> 2021-10-12 Andre Vieira <andre.simoesdiasvie...@arm.com>
>
> * gcc.target/arm/mve/mve.exp: Make it test main directory.
> * gcc.target/arm/mve/mve_load_memory_modes.c: New test.
> * gcc.target/arm/mve/mve_store_memory_modes.c: New test.
