Hi, This patch is adding support for LS64 (Armv8.7-A Load/Store 64 Byte extension) which is part of Armv8.7-A architecture. Changes include missing plumbing for TARGET_LS64, LS64 data structure and intrinsics defined in ACLE [0]. Machine description of intrinsics is using new V8DI mode added in a separate patch. __ARM_FEATURE_LS64 is defined if the Armv8.7-A LS64 instructions for atomic 64-byte access to device memory are supported.
New compiler internal type is added wrapping ACLE struct data512_t [0]:
typedef struct {
uint64_t val[8];
} __arm_data512_t;
Please note that command line support for this feature was already added [1].
[0]
https://github.com/ARM-software/acle/blob/main/main/acle.rst#load-store-64-byte-intrinsics
[1] commit e159c0aa10e50c292a534535c73f38d22b6129a8 (AArch64: Add command-line
support for Armv8.7-a)
For below C code see example snippets of generated code:
#include <arm_acle.h>
void
func(const void * addr, data512_t *data) {
*data = __arm_ld64b (addr);
}
func:
ld64b x8, [x0]
stp x8, x9, [x1]
sub sp, sp, #64
stp x10, x11, [x1, 16]
stp x12, x13, [x1, 32]
stp x14, x15, [x1, 48]
add sp, sp, 64
ret
~~~
#include <arm_acle.h>
uint64_t
func(void *addr, data512_t value) {
return __arm_st64bv (addr, value);
}
func:
ldp x8, x9, [x1]
ldp x10, x11, [x1, 16]
ldp x12, x13, [x1, 32]
ldp x14, x15, [x1, 48]
st64bv x1, x8, [x0]
mov x0, x1
ret
~~~
uint64_t
ls64_store_v0(const data512_t *input, void *addr)
{
uint64_t status;
__asm__ volatile ("st64bv0 %0, %2, [%1]"
: "=r" (status), "=r" (addr)
: "r" (*input)
: "memory");
return status;
}
ls64_store_v0:
ldp x8, x9, [x0]
ldp x10, x11, [x0, 16]
ldp x12, x13, [x0, 32]
ldp x14, x15, [x0, 48]
st64bv0 x0, x8, [x1]
ret
Regtested on aarch64-elf cross and no issues.
OK for master?
gcc/ChangeLog:
2021-11-11 Przemyslaw Wirkus <[email protected]>
* config/aarch64/aarch64-builtins.c (enum aarch64_builtins):
Define AARCH64_LS64_BUILTIN_LD64B, AARCH64_LS64_BUILTIN_ST64B,
AARCH64_LS64_BUILTIN_ST64BV, AARCH64_LS64_BUILTIN_ST64BV0.
(aarch64_init_ls64_builtin_decl): Helper function.
(aarch64_init_ls64_builtins): Helper function.
(aarch64_init_ls64_builtins_types): Helper function.
(aarch64_general_init_builtins): Init LS64 intrisics for
TARGET_LS64.
(aarch64_expand_builtin_ls64): LS64 intrinsics expander.
(aarch64_general_expand_builtin): Handle aarch64_expand_builtin_ls64.
(ls64_builtins_data): New helper struct.
(v8di_UP): New define.
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
__ARM_FEATURE_LS64.
* config/aarch64/aarch64.h (AARCH64_ISA_LS64): New define.
(AARCH64_ISA_V8_7): New define.
(TARGET_LS64): New define.
* config/aarch64/aarch64.md: Add UNSPEC_LD64B, UNSPEC_ST64B,
UNSPEC_ST64BV and UNSPEC_ST64BV0.
(ld64b): New define_insn.
(st64b): New define_insn.
(st64bv): New define_insn.
(st64bv0): New define_insn.
* config/aarch64/arm_acle.h (target):
(data512_t): New type derived from __arm_data512_t.
(__arm_data512_t): New internal type.
(__arm_ld64b): New intrinsic.
(__arm_st64b): New intrinsic.
(__arm_st64bv): New intrinsic.
(__arm_st64bv0): New intrinsic.
* config/arm/types.md: Add new type ls64.
gcc/testsuite/ChangeLog:
2021-11-11 Przemyslaw Wirkus <[email protected]>
* gcc.target/aarch64/acle/ls64_asm.c: New test.
* gcc.target/aarch64/acle/ls64_ld64b-2.c: New test.
* gcc.target/aarch64/acle/ls64_ld64b.c: New test.
* gcc.target/aarch64/acle/ls64_st64b.c: New test.
* gcc.target/aarch64/acle/ls64_st64bv-2.c: New test.
* gcc.target/aarch64/acle/ls64_st64bv.c: New test.
* gcc.target/aarch64/acle/ls64_st64bv0-2.c: New test.
* gcc.target/aarch64/acle/ls64_st64bv0.c: New test.
* gcc.target/aarch64/pragma_cpp_predefs_2.c: Add checks
for __ARM_FEATURE_LS64.
rb14982.patch
Description: rb14982.patch
