On Wed, Nov 15, 2023 at 9:23 PM Jeff Law <jeffreya...@gmail.com> wrote: > > > > On 11/15/23 18:51, Tatsuyuki Ishi wrote: > >> On Nov 16, 2023, at 10:07, Jeff Law <jeffreya...@gmail.com> wrote: > > > > > Based on what I have read in the AArch64 backend, there are two ways to > > do this: introduce a custom calling convention, or put in a RTX insn > > that covers the whole sequence. Ideally we should do the first, but then > > there’s the label issue and it’s quite a bit more complicated. So I’m > > sticking with this for now. > As I said, I think we're OK here. We can always revamp as we get > experience with the implementation -- I don't think any of the stuff > we're talking about is an ABI change, they're just implementation details. > > > > > Sorry for all the delay on this. My progress has been (and still) > > blocked on supporting relaxation of TLSDESC in binutils (turns out you > > can’t run static binaries without relaxing it first). But that doesn’t > > seem exactly easy to do either, because relaxation that involves GOT > > elimination isn’t something we have in the RISC-V backend. > Note that binutils is due for another release in the next month or two. > It'd certainly be helpful to have any issues there resolved in time for > that release. > > > > > I’ll try to send a new version of this patch and get this unblocked on > > GCC side first. > Sounds good. We can always guard its use behind a feature test for GAS > support. > > Jeff
Agreed. Tatsuyuki, could you also add some tests? For example // end of https://maskray.me/blog/2021-02-14-all-about-thread-local-storage __thread int tls0; extern __thread int tls1; int foo() { return ++tls0 + ++tls1; } static __thread int tls2, tls3; int bar() { return ++tls2 + ++tls3; } I have used this to check rtld and linker behavior. I think we need some `scan-assembler`. To make it a runnable test, some assembler feature check may be needed. Perhaps Jeff can make some suggestion or contribute code! -- 宋方睿
