Hi Edwin, this is OK but did you check if we can get rid of the subreg condition now that we have gen_lowpart?
Regards Robin
- [PATCH 0/2] Fix ICE with vwsll combine on 32bit targets Edwin Lu
- [PATCH 1/2] RISC-V: Fix vwsll combine on rv32 targets Edwin Lu
- Re: [PATCH 1/2] RISC-V: Fix vwsll combine on rv32 targ... Robin Dapp
- [PATCH 2/2] RISC-V: Move mode assertion out of conditional... Edwin Lu
