On 03/09/2025 09:40, Kyrylo Tkachov wrote:
> Hi all,
>
> With g:d20b2ad845876eec0ee80a3933ad49f9f6c4ee30 the narrowing shift
> instructions
> are now represented with standard RTL and more merging optimisations occur.
> This exposed a wrong predicate for the shift amount operand.
> The shift amount is the number of bits of the narrow destination, not the
> input
> sources.
> Correct this by using the vn_mode attribute when specifying the predicate,
> which
> exists for this purpose.
>
> I've spotted a few more narrowing shift patterns that need the restriction, so
> they are updated as well.
>
> Bootstrapped and tested on aarch64-none-linux-gnu.
>
> Ok for trunk?
> Thanks,
> Kyrill
>
> Signed-off-by: Kyrylo Tkachov <[email protected]>
>
> gcc/
>
> PR target/121749
> * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn_n<mode>):
> Use aarch64_simd_shift_imm_offset_<vn_mode> instead of
> aarch64_simd_shift_imm_offset_<ve_mode> predicate.
> (aarch64_<shrn_op>shrn_n<mode> VQN define_expand): Likewise.
> (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
> (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
> (aarch64_<shrn_op>rshrn_n<mode> VQN define_expand): Likewise.
> (aarch64_sqshrun_n<mode>_insn): Likewise.
> (aarch64_sqshrun_n<mode>): Likewise.
> (aarch64_sqshrun_n<mode> VQN define_expand): Likewise.
> (aarch64_sqrshrun_n<mode>_insn): Likewise.
> (aarch64_sqrshrun_n<mode>): Likewise.
> (aarch64_sqrshrun_n<mode>): Likewise.
> * config/aarch64/iterators.md (vn_mode): Handle DI, SI, HI modes.
>
> gcc/testsuite/
>
> PR target/121749
> * gcc.target/aarch64/simd/pr121749.c: New test.
>
>
> diff --git a/gcc/testsuite/gcc.target/aarch64/simd/pr121749.c
> b/gcc/testsuite/gcc.target/aarch64/simd/pr121749.c
> new file mode 100644
> index 00000000000..c4e1a2d76cf
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/simd/pr121749.c
> @@ -0,0 +1,11 @@
> +/* { dg-do compile } */
Shouldn't this be dg-do assemble? Otherwise the test isn't really doing
anything AFAICT.
Thanks,
Alex
> +/* { dg-options "-O2" } */
> +
> +#include <arm_neon.h>
> +
> +uint32_t
> +foo (uint64_t v0)
> +{
> + return vqshrnd_n_u64 (vshrd_n_u64 (v0, 26), 7);
> +}
> +
