[PATCH, rtl-optimization]: Fix PR 54455, [4.7/4.8 Regression] ICE: RTL check: expected elt 3 type 'B', have '0' (rtx barrier) in compute_bb_for_insn, at cfgrtl.c:418

[Uros Bizjak]

Hello!

Attached patch prevents compute_bb_for_insn to calculate BB for
barrier RTXes. This is in fact the same approach all other
*_bb_for_insn use.

The patch is bordering on obvious.

2012-09-02  Uros Bizjak  <ubiz...@gmail.com>

        PR rtl-optimization/54455
        * cfgrtl.c (compute_bb_for_insn): Do not compute BB for barrier RTXes.

testsuite/ChangeLog:

2012-09-02  Uros Bizjak  <ubiz...@gmail.com>

        PR rtl-optimization/54455
        * gcc.target/i386/pr54455.c: New test.

Bootstrapped and regression tested on x86_64-pc-linux-gnu {-m32}.

OK for mainline and 4.7?

Uros.

Index: cfgrtl.c
===================================================================
--- cfgrtl.c    (revision 190857)
+++ cfgrtl.c    (working copy)
@@ -415,7 +415,8 @@ compute_bb_for_insn (void)
 
       for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn))
        {
-         BLOCK_FOR_INSN (insn) = bb;
+         if (!BARRIER_P (insn))
+           BLOCK_FOR_INSN (insn) = bb;
          if (insn == end)
            break;
        }
Index: testsuite/gcc.target/i386/pr54455.c
===================================================================
--- testsuite/gcc.target/i386/pr54455.c (revision 0)
+++ testsuite/gcc.target/i386/pr54455.c (working copy)
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-fschedule-insns -fselective-scheduling --param 
max-sched-extend-regions-iters=8" } */
+
+static inline void
+__attribute__ ((always_inline))
+foo (void)
+{
+  asm goto ("" : : "r" (1), "r" (2) : "memory" : lab);
+  lab:;
+}
+
+void bar (void)
+{
+  foo ();
+  foo ();
+}