Re: [PATCH, rtl-optimization]: Fix PR 54455, [4.7/4.8 Regression] ICE: RTL check: expected elt 3 type 'B', have '0' (rtx barrier) in compute_bb_for_insn, at cfgrtl.c:418

[Steven Bosscher]

On Sun, Sep 2, 2012 at 1:22 PM, Uros Bizjak <ubiz...@gmail.com> wrote:
> Hello!
>
> Attached patch prevents compute_bb_for_insn to calculate BB for
> barrier RTXes. This is in fact the same approach all other
> *_bb_for_insn use.
>
> The patch is bordering on obvious.

It is anything _but_ obvious. The code looks like this:

void
compute_bb_for_insn (void)
{
  basic_block bb;

  FOR_EACH_BB (bb)
    {
      rtx end = BB_END (bb);
      rtx insn;

      for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn))
        {
          BLOCK_FOR_INSN (insn) = bb;
          if (insn == end)
            break;
        }
    }
}

This could (&should) actually be written as:

void
compute_bb_for_insn (void)
{
  basic_block bb;
  rtx insn;

  FOR_EACH_BB (bb)
    FOR_BB_INSNS (bb, insn)
      BLOCK_FOR_INSN (insn) = bb;
}

What is happening for you, is that you're seeing a BARRIER between
BB_HEAD(bb) and BB_END(bb), which is not possible. The barrier is
mis-placed.

The patch is not OK.

Ciao!
Steven