The DImode constant spliiter assigned the result of trunc_int_for_mode to an unsigned int rather than a HOST_WIDE_INT. This then produced const_ints that were zero-extended rather than sign-extended and tripped the assert:
gcc_checking_assert (INTVAL (x.first) == sext_hwi (INTVAL (x.first), precision) || (x.second == BImode && INTVAL (x.first) == 1)); The other hunks are just by inspection, but I think gen_int_mode is preferred over GEN_INT when the mode is obvious. Tested by Rainer, who says that the boostrap now completes. OK to install? Thanks, Richard gcc/ PR target/61084 * config/sparc/sparc.md: Fix types of low and high in DI constant splitter. Use gen_int_mode in some other splitters. Index: gcc/config/sparc/sparc.md =================================================================== --- gcc/config/sparc/sparc.md 2014-05-07 10:15:23.051156294 +0100 +++ gcc/config/sparc/sparc.md 2014-05-07 10:15:27.922201361 +0100 @@ -1886,7 +1886,7 @@ (define_split emit_insn (gen_movsi (gen_lowpart (SImode, operands[0]), operands[1])); #else - unsigned int low, high; + HOST_WIDE_INT low, high; low = trunc_int_for_mode (INTVAL (operands[1]), SImode); high = trunc_int_for_mode (INTVAL (operands[1]) >> 32, SImode); @@ -4822,7 +4822,7 @@ (define_split [(set (match_dup 3) (match_dup 4)) (set (match_dup 0) (ior:SI (not:SI (match_dup 3)) (match_dup 1)))] { - operands[4] = GEN_INT (~INTVAL (operands[2])); + operands[4] = gen_int_mode (~INTVAL (operands[2]), SImode); }) (define_insn_and_split "*or_not_di_sp32" @@ -4899,7 +4899,7 @@ (define_split [(set (match_dup 3) (match_dup 4)) (set (match_dup 0) (not:SI (xor:SI (match_dup 3) (match_dup 1))))] { - operands[4] = GEN_INT (~INTVAL (operands[2])); + operands[4] = gen_int_mode (~INTVAL (operands[2]), SImode); }) (define_split @@ -4911,7 +4911,7 @@ (define_split [(set (match_dup 3) (match_dup 4)) (set (match_dup 0) (xor:SI (match_dup 3) (match_dup 1)))] { - operands[4] = GEN_INT (~INTVAL (operands[2])); + operands[4] = gen_int_mode (~INTVAL (operands[2]), SImode); }) ;; Split DImode logical operations requiring two instructions.