> Please mention the PR in the ChangeLog entry and add some testcases > (can be gcc.target/i386/, but we should have it tested). > Does this change anything on say register short sil __asm ("sil"); in 32-bit > mode (when it IMHO should be rejected too?)? > Do we support "sil" at all? In i386.h i see:
/* Note we are omitting these since currently I don't know how to get gcc to use these, since they want the same but different number as al, and ax. */ #define QI_REGISTER_NAMES \ {"al", "dl", "cl", "bl", "sil", "dil", "bpl", "spl",} And gcc doesn't recognize sil. Added testcase, and fixed avx512f-additional-reg-names.c to be valid on 32 bits. Ok for trunk? gcc/ 2014-09-01 Ilya Tocar <ilya.to...@intel.com> PR middle-end/62120 * varasm.c (decode_reg_name_and_count): Check availability for registers from ADDITIONAL_REGISTER_NAMES. Testsuite/ 2014-09-01 Ilya Tocar <ilya.to...@intel.com> PR middle-end/62120 * gcc.target/i386/avx512f-additional-reg-names.c: Use register vaild in 32-bit mode. * gcc.target/i386/pr62120.c: New. --- gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c | 2 +- gcc/testsuite/gcc.target/i386/pr62120.c | 7 +++++++ gcc/varasm.c | 5 +++-- 3 files changed, 11 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr62120.c diff --git a/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c b/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c index 164a1de..98a9052 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c @@ -3,7 +3,7 @@ void foo () { - register int zmm_var asm ("zmm9") __attribute__((unused)); + register int zmm_var asm ("zmm7") __attribute__((unused)); __asm__ __volatile__("vxorpd %%zmm0, %%zmm0, %%zmm7\n" : : : "zmm7" ); } diff --git a/gcc/testsuite/gcc.target/i386/pr62120.c b/gcc/testsuite/gcc.target/i386/pr62120.c new file mode 100644 index 0000000..8870d48 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr62120.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-sse" } */ + +void foo () +{ + register int zmm_var asm ("ymm9");/* { dg-error "invalid register name" } */ +} diff --git a/gcc/varasm.c b/gcc/varasm.c index de4479c..9638665 100644 --- a/gcc/varasm.c +++ b/gcc/varasm.c @@ -888,7 +888,7 @@ decode_reg_name_and_count (const char *asmspec, int *pnregs) if (asmspec[0] != 0 && i < 0) { i = atoi (asmspec); - if (i < FIRST_PSEUDO_REGISTER && i >= 0) + if (i < FIRST_PSEUDO_REGISTER && i >= 0 && reg_names[i][0]) return i; else return -2; @@ -925,7 +925,8 @@ decode_reg_name_and_count (const char *asmspec, int *pnregs) for (i = 0; i < (int) ARRAY_SIZE (table); i++) if (table[i].name[0] - && ! strcmp (asmspec, table[i].name)) + && ! strcmp (asmspec, table[i].name) + && reg_names[table[i].number][0]) return table[i].number; } #endif /* ADDITIONAL_REGISTER_NAMES */ -- 1.8.3.1