On Tue, Sep 30, 2014 at 02:44:21PM +0400, Ilya Tocar wrote: > > 2014-09-15 Ilya Tocar <ilya.to...@intel.com> > > > > PR middle-end/62120 > > * varasm.c (decode_reg_name_and_count): Check availability for > > registers from ADDITIONAL_REGISTER_NAMES. > > > > Testsuite/ > > > > 2014-09-15 Ilya Tocar <ilya.to...@intel.com> > > > > PR middle-end/62120 > > * gcc.target/i386/avx512f-additional-reg-names.c: Use register vaild
s/vaild/valid/ > > in 32-bit mode. > > * gcc.target/i386/pr62120.c: New. > > > > --- > > gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c | 2 +- > > gcc/testsuite/gcc.target/i386/pr62120.c | 8 ++++++++ > > gcc/varasm.c | 5 +++-- > > 3 files changed, 12 insertions(+), 3 deletions(-) > > create mode 100644 gcc/testsuite/gcc.target/i386/pr62120.c > > > > diff --git a/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c > > b/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c > > index 164a1de..98a9052 100644 > > --- a/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c > > +++ b/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c > > @@ -3,7 +3,7 @@ > > > > void foo () > > { > > - register int zmm_var asm ("zmm9") __attribute__((unused)); > > + register int zmm_var asm ("zmm7") __attribute__((unused)); > > > > __asm__ __volatile__("vxorpd %%zmm0, %%zmm0, %%zmm7\n" : : : "zmm7" ); Please use zmm6 instead, zmm7 is clobbered in the following statement. Otherwise LGTM. Jakub