On Fri, Feb 23, 2007 at 04:13:39PM -0800, sdutta wrote: > I am targeting GCC 4.1.1 to a custom RISC processor; which has some vector > instructions (32 bit vectors). It can perform two 16 bit/ or four 8 bit > additions, subtractions, multiplications & shift operations simultaneously. > > I would like to use the Auto-Vectorizing capability to generate these > instructions. Is there an existing backend that I could look at for > something similar? Any help will be greatly appreciated.
The cleanest example may be located in gcc/config/ia64/vect.md. r~
