Hi,
I am trying to enable delayed branch scheduling on our port of Gcc for
picochip (16-bit VLIW DSP). I understand that delayed-branch is run as a
seperate pass after the DFA scheduling is done. We basically depend on
the TImode set on the cycle-start instructions to decide what
instructions form a valid VLIW. By enabling delayed-branch, it seems
like the delay-branch pass takes any instruction and puts it on the
delay slot. This sometimes seem to pick the TImode set instructions, but
does not seem to set the TImode on the next instruction.
Has anyone faced a similar problem before? Are there targets for which
both VLIW and DBR are enabled? Perhaps ia64?
Thanks for your help.
Regards
Hari
