A patch follows. I didn't take care of the scheduling case the correct way, tought (aliased to clz class).
Can someone please review (works for me (c)) and merge? -- Alexandre
--- gcc-4.3.2/gcc/config/arm/arm.md~ 2008-12-05 18:17:09.000000000 -0200 +++ gcc-4.3.2/gcc/config/arm/arm.md 2008-12-05 18:17:09.000000000 -0200 @@ -10808,6 +10808,16 @@ "TARGET_32BIT && arm_arch5e" "pld\\t%a0") +;; V6 instructions. +(define_insn "bswapsi2" + [(set (match_operand:SI 0 "s_register_operand" "=r") + (bswap:SI (match_operand:SI 1 "s_register_operand" "r")))] + "arm_arch6" + "rev%?\\t%0, %1" + [(set_attr "predicable" "yes") + (set_attr "insn" "clz")]) + + ;; General predication pattern (define_cond_exec
