Michael Hope <[email protected]> writes:
> Hi there. I'm looking at porting GCC to a new architecture which has
> a quite small instruction set and I'm afraid I can't figure out how to
> represent unintended side effects on instructions.
>
> My current problem is accessing memory. Reading an aligned 32 bit
> word is simple using LOADACC, (X). Half words and bytes are harder as
> the only instruction available is a load byte with post increment
> 'LOADACC, (X+)'.
Wow.
> How can I tell GCC that loading a byte also increases the pointer
> register? My first version reserved one of the pointer registers and
> threw away the modified value but this is inefficient. I suspect that
> some type of clobber or define_expand is required but I can't figure
> it out.
Well, you can use a define_expand to generate the move in the first
place. If can_create_pseudo_p() returns true, then you can call
copy_to_reg (addr) to get the address into a register, and you can
generate the post increment.
(define_expand "movhi"
...
if (can_create_pseudo_p () && MEM_P (operands[1]))
{
rtx reg = copy_to_reg (XEXP (operands[1], 0));
emit_insn (gen_movhi_insn (operands[0], reg));
DONE;
}
...
)
(define_insn "movhi_insn"
[(set (match_operand:HI 0 ...)
(mem:HI (post_inc:P (match_operand:P 1 "register_operand" ...))))]
...
)
The difficulties are going to come in reload. Reload will want to load
and store 16-bit values in order to spill registers. You will need a
scratch register to dothis, and that means that you need to implement
TARGET_SECONDARY_RELOAD. This is complicated:read the docs carefully
and look at the existing examples.
Ian
