Hello all, I am trying to do a port on GCC 4.5. The target has a memory resolution of 32bits i.e. char is 32bits in the target (addr 0 selects 1st 32bit and addr 1 selects 2nd 32bit). It has only word (32bit) access.
In terms of address resolution this target is similar to c4x which became obsolete in GCC 4.2. There are two ways to implement this port. One is to have BITS_PER_UNIT ==32, like c4x and other is to have a normal C like char == 8, short == 16, and int == 32. We are thinking about having BITS_PER_UNIT == 32. Yes I know the support for such a target is bit rotten in GCC. I am currently trying to removing it. In the mean time, we are in the process of finalizing the instructions. The current instruction set has support for 32bit immediate data only in move operations. i.e. move src1GP, #imm32 For all other operations like div, sub, add, compare, modulus, load, store the support is only for 16bit immediate. For all these instruction there is separate flavor for sign and zero extension. i.e. mod.s32 srcdstGP, #imm16 // 32%imm16 signed modulus mod.u32 srcdstGP, #imm16 // 32%imm16 unsigned modulus cmp.s32 src1GP, #imm16 // signed register to 16-bit immediate compare cmp.u32 src1GP, #imm16 // unsigned register to 16-bit immediate compare sub.s32 srcdstGP, #imm16 // signed 16-bit register to immediate subtract sub.u32 srcdstGP, #imm16 // unsigned 16-bit register to immediate subtract I want to know if it is good to have both sign and zero extension for 16bit immediate. Will it be of any use with a configuration where char == short == int == 32bit? Will I be able to support these kinds of instructions in a GCC port? Or will it good to have a separate sign and zero extension instruction, which the current instruction set doesn’t have. Do I need a separate sign and zero ext instructions along with the above instructions? It would be of great help if you could guide me in deciding these instructions. Regards, Shafi
