fanqifei <fanqi...@gmail.com> writes:
> I am porting gcc to a microprocessor. There are no 64bits instructions
> in it. I added a small logical shift right optimization to the md
> file(see below).
> For the statement “k>>32” in which k is 64bits integer, the
> “define_expand” should fail because op2 is 32, not 1.
> However, I can see the lshiftrt:DI is still generated in rtl dumps
> even if I commented out the “define_expand”. If both “define_expand”
> and “define_isns” are commented out, the result is correct.
> (insn 51 47 52 4 p_b.c:491 (set (reg:DI 42 [ D.1783 ])
> (lshiftrt:DI (reg/v:DI 35 [ k ])
> (const_int 32 [0x20]))) 58 {*lshrdi3S1} (nil))
This means that your lshrdi3S1 insn accepted the shift. You need to
reject invalid operands in the instruction predicate. Otherwise gcc can
generate them via pattern generation. gcc does not exclusively go
through define_expand.
> I am wondering what’s the usage of REG_EQUAL? ( I have read gcc
> internal, but still don’t quite understand).
REG_EQUAL is used for optimizations. When a sequence of insns generates
a result which can be expressed as a simple expression, REG_EQUAL holds
that expression. If gcc later sees that the result is used in a simple
way, it can sometimes use the REG_EQUAL note to simplify the result.
> Why the instructions (47-51) are replaced by lshiftrt:DI when there is
> no lshrdi3 insn defined in md file?
There is an lshrdi3S1 insn which matches a generated pattern.
Ian
