Paolo Bonzini schrieb:
> On 10/27/2010 12:54 PM, Georg Lay wrote:
>>>> reg 26 (Stackpointer) and reg 27 (return address) do not matter here.
>>>> The result ist
>>>>
>>>> insn 10 (CALL) CURRENT = FIRST = 0xc008010 = {...,4,15}
>>>
>>> Ok, this looks like a bug somewhere (either in DF or in your backend).
>>
>> hmmm. How could the backend introduce a bug in lifeness?
>> REG15 is special in some way
>>
>> - it is call-saved
>> - it is neither an element of FUNCTION_ARG_REGNO_P nor of EPILOGUE_USES
>> nor of CALL_[REALLY_]USED_REGISTERS
>
> Looks fine.
>
> However, your previous dump showed {2,26,27} for lr out, while this
> debug output shows {2,15,26,27} at the beginning of
> df_simulate_initialize_backwards.
>
> I would then look at the dump for the previous pass, and/or put
> breakpoints before/after df_analyze to see why the two dumps differ.
That dump was from IRA.
The first time d15 can be seen in "lr out" is dse2:
peep2.c.193r.split2:;; lr out 2 [d2] 26 [SP] 27 [a11]
peep2.c.195r.pro_and_epilogue:;; lr out 2 [d2] 26 [SP] 27 [a11]
peep2.c.196r.dse2:;; lr out 2 [d2] 15 [d15] 26 [SP] 27 [a11]
The first time it occurs in "exit block uses" is in pro/epilogue:
peep2.c.193r.split2:;; exit block uses 2 [d2] 26 [SP] 27 [a11]
peep2.c.195r.pro_and_epilogue:;; exit block uses 2 [d2] 15 [d15] 26 [SP]
27 [a11]
peep2.c.196r.dse2:;; exit block uses 2 [d2] 15 [d15] 26 [SP] 27 [a11]
peep2.c.196r.dse2:;; exit block uses 2 [d2] 15 [d15] 26 [SP] 27 [a11]
I define'd REG_DEAD_DEBUGGING, but that doesn't give more information, and none
of these passes produces dumps for my match in df-problems.c.
...and df is much too complicated as not to get lost in it...
Georg
;; Function and (and)
scanning new insn with uid = 22.
scanning new insn with uid = 23.
deleting insn with uid = 9.
deleting insn with uid = 9.
and
Dataflow summary:
;; invalidated by call 0 [d0] 1 [d1] 2 [d2] 3 [d3] 4 [d4] 5 [d5] 6
[d6] 7 [d7] 18 [a2] 19 [a3] 20 [a4] 21 [a5] 22 [a6] 23 [a7]
;; hardware regs used 26 [SP]
;; regular block artificial uses 26 [SP]
;; eh block artificial uses 26 [SP] 32 [ARGP]
;; entry block defs 2 [d2] 4 [d4] 5 [d5] 6 [d6] 7 [d7] 19 [a3] 20 [a4] 21
[a5] 22 [a6] 23 [a7] 26 [SP] 27 [a11] 31 [a15]
;; exit block uses 2 [d2] 26 [SP] 27 [a11]
;; regs ever live 2[d2] 4[d4] 15[d15] 26[SP]
;; ref usage r0={1d} r1={1d} r2={2d,1u} r3={1d} r4={3d,3u} r5={2d} r6={2d}
r7={2d} r15={2d,2u} r18={1d} r19={2d} r20={2d} r21={2d} r22={2d} r23={2d}
r26={1d,3u} r27={1d,1u} r31={1d}
;; total ref usage 40{30d,10u,0e} in 4{3 regular + 1 call} insns.
(note 1 0 4 NOTE_INSN_DELETED)
;; Start of basic block ( 0) -> 2
;; bb 2 artificial_defs: { }
;; bb 2 artificial_uses: { u-1(26){ }}
;; lr in 4 [d4] 26 [SP] 27 [a11]
;; lr use 4 [d4] 26 [SP]
;; lr def 0 [d0] 1 [d1] 2 [d2] 3 [d3] 4 [d4] 5 [d5] 6 [d6] 7 [d7] 15
[d15] 18 [a2] 19 [a3] 20 [a4] 21 [a5] 22 [a6] 23 [a7]
;; live in 4 [d4] 26 [SP] 27 [a11]
;; live gen 2 [d2] 4 [d4] 15 [d15]
;; live kill
;; Pred edge ENTRY [100.0%] (fallthru)
(note 4 1 2 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(note 2 4 3 2 NOTE_INSN_DELETED)
(note 3 2 8 2 NOTE_INSN_FUNCTION_BEG)
(note 8 3 22 2 NOTE_INSN_DELETED)
(insn 22 8 23 2 peep2.c:5 (set (reg:SI 15 d15)
(and:SI (reg:SI 4 d4 [ x ])
(const_int -98305 [0xfffe7fff]))) 139 {*andsi3_zeroes.insert.ic}
(nil))
(insn 23 22 21 2 peep2.c:5 (set (reg:SI 15 d15)
(xor:SI (reg:SI 15 d15)
(reg:SI 4 d4 [ x ]))) 39 {*xorsi3} (nil))
(insn 21 23 10 2 peep2.c:5 (set (reg:SI 4 d4)
(reg:SI 15 d15)) 2 {*movsi_insn} (nil))
(call_insn/j 10 21 11 2 peep2.c:5 (parallel [
(set (reg:SI 2 d2)
(call (mem:HI (symbol_ref:SI ("f") [flags 0x41] <function_decl
0xb7522280 f>) [0 S2 A16])
(const_int 0 [0x0])))
(use (const_int 1 [0x1]))
]) 92 {call_value_insn} (nil)
(expr_list:REG_DEP_TRUE (use (reg:SI 4 d4))
(nil)))
;; End of basic block 2 -> ( 1)
;; lr out 2 [d2] 26 [SP] 27 [a11]
;; live out 2 [d2] 26 [SP] 27 [a11]
;; Succ edge EXIT [100.0%] (ab,sibcall)
(barrier 11 10 20)
(note 20 11 0 NOTE_INSN_DELETED)
;; Function and (and)
try_optimize_cfg iteration 1
verify found no changes in insn with uid = 10.
and
Dataflow summary:
;; invalidated by call 0 [d0] 1 [d1] 2 [d2] 3 [d3] 4 [d4] 5 [d5] 6
[d6] 7 [d7] 18 [a2] 19 [a3] 20 [a4] 21 [a5] 22 [a6] 23 [a7]
;; hardware regs used 26 [SP]
;; regular block artificial uses 26 [SP]
;; eh block artificial uses 26 [SP] 32 [ARGP]
;; entry block defs 2 [d2] 4 [d4] 5 [d5] 6 [d6] 7 [d7] 15 [d15] 19 [a3] 20
[a4] 21 [a5] 22 [a6] 23 [a7] 26 [SP] 27 [a11] 31 [a15]
;; exit block uses 2 [d2] 15 [d15] 26 [SP] 27 [a11]
;; regs ever live 2[d2] 4[d4] 15[d15] 26[SP]
;; ref usage r0={1d} r1={1d} r2={2d,1u} r3={1d} r4={3d,3u} r5={2d} r6={2d}
r7={2d} r15={3d,3u} r18={1d} r19={2d} r20={2d} r21={2d} r22={2d} r23={2d}
r26={1d,3u} r27={1d,1u} r31={1d}
;; total ref usage 42{31d,11u,0e} in 4{3 regular + 1 call} insns.
(note 1 0 4 NOTE_INSN_DELETED)
;; Start of basic block ( 0) -> 2
;; bb 2 artificial_defs: { }
;; bb 2 artificial_uses: { u-1(26){ }}
;; lr in 4 [d4] 26 [SP] 27 [a11]
;; lr use 4 [d4] 26 [SP]
;; lr def 0 [d0] 1 [d1] 2 [d2] 3 [d3] 4 [d4] 5 [d5] 6 [d6] 7 [d7] 15
[d15] 18 [a2] 19 [a3] 20 [a4] 21 [a5] 22 [a6] 23 [a7]
;; live in 4 [d4] 26 [SP] 27 [a11]
;; live gen 2 [d2] 4 [d4] 15 [d15]
;; live kill
;; Pred edge ENTRY [100.0%] (fallthru)
(note 4 1 24 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(note 24 4 2 2 NOTE_INSN_PROLOGUE_END)
(note 2 24 3 2 NOTE_INSN_DELETED)
(note 3 2 8 2 NOTE_INSN_FUNCTION_BEG)
(note 8 3 22 2 NOTE_INSN_DELETED)
(insn 22 8 23 2 peep2.c:5 (set (reg:SI 15 d15)
(and:SI (reg:SI 4 d4 [ x ])
(const_int -98305 [0xfffe7fff]))) 139 {*andsi3_zeroes.insert.ic}
(nil))
(insn 23 22 21 2 peep2.c:5 (set (reg:SI 15 d15)
(xor:SI (reg:SI 15 d15)
(reg:SI 4 d4 [ x ]))) 39 {*xorsi3} (nil))
(insn 21 23 25 2 peep2.c:5 (set (reg:SI 4 d4)
(reg:SI 15 d15)) 2 {*movsi_insn} (nil))
(note 25 21 10 2 NOTE_INSN_EPILOGUE_BEG)
(call_insn/j 10 25 11 2 peep2.c:5 (parallel [
(set (reg:SI 2 d2)
(call (mem:HI (symbol_ref:SI ("f") [flags 0x41] <function_decl
0xb7522280 f>) [0 S2 A16])
(const_int 0 [0x0])))
(use (const_int 1 [0x1]))
]) 92 {call_value_insn} (nil)
(expr_list:REG_DEP_TRUE (use (reg:SI 4 d4))
(nil)))
;; End of basic block 2 -> ( 1)
;; lr out 2 [d2] 26 [SP] 27 [a11]
;; live out 2 [d2] 26 [SP] 27 [a11]
;; Succ edge EXIT [100.0%] (ab,sibcall)
(barrier 11 10 20)
(note 20 11 0 NOTE_INSN_DELETED)
starting the processing of deferred insns
ending the processing of deferred insns
;; Function and (and)
starting the processing of deferred insns
ending the processing of deferred insns
df_analyze called
df_worklist_dataflow_doublequeue:n_basic_blocks 3 n_edges 2 count 4 ( 1.3)
df_worklist_dataflow_doublequeue:n_basic_blocks 3 n_edges 2 count 4 ( 1.3)
and
Dataflow summary:
def_info->table_size = 0, use_info->table_size = 0
;; invalidated by call 0 [d0] 1 [d1] 2 [d2] 3 [d3] 4 [d4] 5 [d5] 6
[d6] 7 [d7] 18 [a2] 19 [a3] 20 [a4] 21 [a5] 22 [a6] 23 [a7]
;; hardware regs used 26 [SP]
;; regular block artificial uses 26 [SP]
;; eh block artificial uses 26 [SP] 32 [ARGP]
;; entry block defs 2 [d2] 4 [d4] 5 [d5] 6 [d6] 7 [d7] 15 [d15] 19 [a3] 20
[a4] 21 [a5] 22 [a6] 23 [a7] 26 [SP] 27 [a11] 31 [a15]
;; exit block uses 2 [d2] 15 [d15] 26 [SP] 27 [a11]
;; regs ever live 2[d2] 4[d4] 15[d15] 26[SP]
;; ref usage r0={1d} r1={1d} r2={2d,1u} r3={1d} r4={3d,3u} r5={2d} r6={2d}
r7={2d} r15={3d,3u} r18={1d} r19={2d} r20={2d} r21={2d} r22={2d} r23={2d}
r26={1d,3u} r27={1d,1u} r31={1d}
;; total ref usage 42{31d,11u,0e} in 4{3 regular + 1 call} insns.
(note 1 0 4 NOTE_INSN_DELETED)
;; Start of basic block ( 0) -> 2
;; bb 2 artificial_defs: { }
;; bb 2 artificial_uses: { u-1(26){ }}
;; lr in 4 [d4] 26 [SP] 27 [a11]
;; lr use 4 [d4] 26 [SP]
;; lr def 0 [d0] 1 [d1] 2 [d2] 3 [d3] 4 [d4] 5 [d5] 6 [d6] 7 [d7] 15
[d15] 18 [a2] 19 [a3] 20 [a4] 21 [a5] 22 [a6] 23 [a7]
;; live in 4 [d4] 26 [SP] 27 [a11]
;; live gen 2 [d2] 4 [d4] 15 [d15]
;; live kill
;; Pred edge ENTRY [100.0%] (fallthru)
(note 4 1 24 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(note 24 4 2 2 NOTE_INSN_PROLOGUE_END)
(note 2 24 3 2 NOTE_INSN_DELETED)
(note 3 2 8 2 NOTE_INSN_FUNCTION_BEG)
(note 8 3 22 2 NOTE_INSN_DELETED)
(insn 22 8 23 2 peep2.c:5 (set (reg:SI 15 d15)
(and:SI (reg:SI 4 d4 [ x ])
(const_int -98305 [0xfffe7fff]))) 139 {*andsi3_zeroes.insert.ic}
(nil))
(insn 23 22 21 2 peep2.c:5 (set (reg:SI 15 d15)
(xor:SI (reg:SI 15 d15)
(reg:SI 4 d4 [ x ]))) 39 {*xorsi3} (nil))
(insn 21 23 25 2 peep2.c:5 (set (reg:SI 4 d4)
(reg:SI 15 d15)) 2 {*movsi_insn} (nil))
(note 25 21 10 2 NOTE_INSN_EPILOGUE_BEG)
(call_insn/j 10 25 11 2 peep2.c:5 (parallel [
(set (reg:SI 2 d2)
(call (mem:HI (symbol_ref:SI ("f") [flags 0x41] <function_decl
0xb7522280 f>) [0 S2 A16])
(const_int 0 [0x0])))
(use (const_int 1 [0x1]))
]) 92 {call_value_insn} (nil)
(expr_list:REG_DEP_TRUE (use (reg:SI 4 d4))
(nil)))
;; End of basic block 2 -> ( 1)
;; lr out 2 [d2] 15 [d15] 26 [SP] 27 [a11]
;; live out 2 [d2] 15 [d15] 26 [SP] 27 [a11]
;; Succ edge EXIT [100.0%] (ab,sibcall)
(barrier 11 10 20)
(note 20 11 0 NOTE_INSN_DELETED)
live at bottom 4 [d4] 26 [SP] 27 [a11]
artificial def 2
artificial def 4
artificial def 5
artificial def 6
artificial def 7
artificial def 15
artificial def 19
artificial def 20
artificial def 21
artificial def 22
artificial def 23
artificial def 26
artificial def 27
artificial def 31
live before artificials out
live at bottom
live before artificials out 2 [d2] 15 [d15] 26 [SP] 27 [a11]
live at bottom 2 [d2] 15 [d15] 26 [SP] 27 [a11]
live before artificials out 2 [d2] 15 [d15] 26 [SP] 27 [a11]
processing call 10
live = 2 [d2] 15 [d15] 26 [SP] 27 [a11]
regular looking at def d-1 reg 2 bb 2 insn 10 flag 0x8 type 0x0 loc
0xb74b8e80(0xb7518810) chain { }
regular looking at use u-1 reg 26 bb 2 insn 10 flag 0x2008 type 0x1 chain { }
regular looking at use u-1 reg 4 bb 2 insn 10 flag 0x8 type 0x1 loc
0xb74d8cb4(0xb75187f0) chain { }
adding 4: 10 (expr_list:REG_DEAD (reg:SI 4 d4)
(nil))
regular looking at def d-1 reg 4 bb 2 insn 21 flag 0x8 type 0x0 loc
0xb74b8d3c(0xb75187f0) chain { }
regular looking at use u-1 reg 15 bb 2 insn 21 flag 0x8 type 0x1 loc
0xb74b8d40(0xb75189d0) chain { }
regular looking at def d-1 reg 15 bb 2 insn 23 flag 0x8 type 0x0 loc
0xb74b8d84(0xb75189d0) chain { }
regular looking at use u-1 reg 4 bb 2 insn 23 flag 0x8 type 0x1 loc
0xb74b8d28(0xb75187a0) chain { }
adding 4: 23 (expr_list:REG_DEAD (reg:SI 4 d4 [ x ])
(nil))
regular looking at use u-1 reg 15 bb 2 insn 23 flag 0x8 type 0x1 loc
0xb74b8d24(0xb75189d0) chain { }
regular looking at def d-1 reg 15 bb 2 insn 22 flag 0x8 type 0x0 loc
0xb74b8d6c(0xb75189d0) chain { }
regular looking at use u-1 reg 4 bb 2 insn 22 flag 0x8 type 0x1 loc
0xb74b8d60(0xb75187a0) chain { }
**scanning insn=22
mems_found = 0, cannot_delete = true
cselib value 1:1 0x888a360 (reg:SI 4 d4 [ x ])
cselib lookup (reg:SI 4 d4 [ x ]) => 1:1
cselib lookup (reg:SI 4 d4 [ x ]) => 1:1
cselib value 2:4294872929 0x888a378 (and:SI (reg:SI 4 d4 [ x ])
(const_int -98305 [0xfffe7fff]))
cselib lookup (and:SI (reg:SI 4 d4 [ x ])
(const_int -98305 [0xfffe7fff])) => 2:4294872929
**scanning insn=23
mems_found = 0, cannot_delete = true
cselib lookup (reg:SI 4 d4 [ x ]) => 1:1
cselib lookup (reg:SI 15 d15) => 2:4294872929
cselib value 3:4294872999 0x888a390 (xor:SI (reg:SI 15 d15)
(reg:SI 4 d4 [ x ]))
cselib lookup (xor:SI (reg:SI 15 d15)
(reg:SI 4 d4 [ x ])) => 3:4294872999
**scanning insn=21
mems_found = 0, cannot_delete = true
cselib lookup (reg:SI 15 d15) => 3:4294872999
**scanning insn=10
cselib value 4:5913 0x888a3a8 (symbol_ref:SI ("f") [flags 0x41] <function_decl
0xb7522280 f>)
cselib lookup (symbol_ref:SI ("f") [flags 0x41] <function_decl 0xb7522280 f>)
=> 4:5913
mem: (symbol_ref:SI ("f") [flags 0x41] <function_decl 0xb7522280 f>)
after canon_rtx address: (symbol_ref:SI ("f") [flags 0x41] <function_decl
0xb7522280 f>)
gid=0 offset=0
processing const load gid=0[0..2)
cselib lookup (call (mem:HI (symbol_ref:SI ("f") [flags 0x41] <function_decl
0xb7522280 f>) [0 S2 A16])
(const_int 0 [0x0])) => 0:0
group 0(0+0): n p
dse: local deletions = 0, global deletions = 0, spill deletions = 0
and
Dataflow summary:
;; invalidated by call 0 [d0] 1 [d1] 2 [d2] 3 [d3] 4 [d4] 5 [d5] 6
[d6] 7 [d7] 18 [a2] 19 [a3] 20 [a4] 21 [a5] 22 [a6] 23 [a7]
;; hardware regs used 26 [SP]
;; regular block artificial uses 26 [SP]
;; eh block artificial uses 26 [SP] 32 [ARGP]
;; entry block defs 2 [d2] 4 [d4] 5 [d5] 6 [d6] 7 [d7] 15 [d15] 19 [a3] 20
[a4] 21 [a5] 22 [a6] 23 [a7] 26 [SP] 27 [a11] 31 [a15]
;; exit block uses 2 [d2] 15 [d15] 26 [SP] 27 [a11]
;; regs ever live 2[d2] 4[d4] 15[d15] 26[SP]
;; ref usage r0={1d} r1={1d} r2={2d,1u} r3={1d} r4={3d,3u} r5={2d} r6={2d}
r7={2d} r15={3d,3u} r18={1d} r19={2d} r20={2d} r21={2d} r22={2d} r23={2d}
r26={1d,3u} r27={1d,1u} r31={1d}
;; total ref usage 42{31d,11u,0e} in 4{3 regular + 1 call} insns.
(note 1 0 4 NOTE_INSN_DELETED)
;; Start of basic block ( 0) -> 2
;; bb 2 artificial_defs: { }
;; bb 2 artificial_uses: { u-1(26){ }}
;; lr in 4 [d4] 26 [SP] 27 [a11]
;; lr use 4 [d4] 26 [SP]
;; lr def 0 [d0] 1 [d1] 2 [d2] 3 [d3] 4 [d4] 5 [d5] 6 [d6] 7 [d7] 15
[d15] 18 [a2] 19 [a3] 20 [a4] 21 [a5] 22 [a6] 23 [a7]
;; live in 4 [d4] 26 [SP] 27 [a11]
;; live gen 2 [d2] 4 [d4] 15 [d15]
;; live kill
;; Pred edge ENTRY [100.0%] (fallthru)
(note 4 1 24 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(note 24 4 2 2 NOTE_INSN_PROLOGUE_END)
(note 2 24 3 2 NOTE_INSN_DELETED)
(note 3 2 8 2 NOTE_INSN_FUNCTION_BEG)
(note 8 3 22 2 NOTE_INSN_DELETED)
(insn 22 8 23 2 peep2.c:5 (set (reg:SI 15 d15)
(and:SI (reg:SI 4 d4 [ x ])
(const_int -98305 [0xfffe7fff]))) 139 {*andsi3_zeroes.insert.ic}
(nil))
(insn 23 22 21 2 peep2.c:5 (set (reg:SI 15 d15)
(xor:SI (reg:SI 15 d15)
(reg:SI 4 d4 [ x ]))) 39 {*xorsi3} (expr_list:REG_DEAD (reg:SI 4 d4
[ x ])
(nil)))
(insn 21 23 25 2 peep2.c:5 (set (reg:SI 4 d4)
(reg:SI 15 d15)) 2 {*movsi_insn} (nil))
(note 25 21 10 2 NOTE_INSN_EPILOGUE_BEG)
(call_insn/j 10 25 11 2 peep2.c:5 (parallel [
(set (reg:SI 2 d2)
(call (mem:HI (symbol_ref:SI ("f") [flags 0x41] <function_decl
0xb7522280 f>) [0 S2 A16])
(const_int 0 [0x0])))
(use (const_int 1 [0x1]))
]) 92 {call_value_insn} (expr_list:REG_DEAD (reg:SI 4 d4)
(nil))
(expr_list:REG_DEP_TRUE (use (reg:SI 4 d4))
(nil)))
;; End of basic block 2 -> ( 1)
;; lr out 2 [d2] 15 [d15] 26 [SP] 27 [a11]
;; live out 2 [d2] 15 [d15] 26 [SP] 27 [a11]
;; Succ edge EXIT [100.0%] (ab,sibcall)
(barrier 11 10 20)
(note 20 11 0 NOTE_INSN_DELETED)
starting the processing of deferred insns
ending the processing of deferred insns
