> -----Original Message----- > From: Paolo Bonzini [mailto:paolo.bonz...@gmail.com] On Behalf Of Paolo > Bonzini > Sent: 22 December 2010 14:33 > To: Claudiu Zissulescu > Cc: Bingfeng Mei; gcc@gcc.gnu.org > Subject: Re: BImode is treated as normal byte-wide mode and causes bug. > > On 12/20/2010 12:43 PM, Claudiu Zissulescu wrote: > > Hi, > > > > Why don't you use a define_insn "zero_extendbisi2" which generates > > your conversion instruction. > > You're right that this should be a valid workaround, but Bingfeng > reported a bug indeed. > I guess Claudiu meant define_expand. There could be several workarounds, one of which I am using now.
> (zero_extend:SI (reg:BI 120)) > > should have been transformed to > > (and:SI (subreg:SI (reg:BI 120) 0) > (const_int 1 [0xff])) > > and > > (subreg:QI (zero_extend:SI (reg:BI 120)) 0) > > to > > (and:QI (subreg:QI (reg:BI 120) 0) > (const_int 1 [0xff])) > > That said, his observation that > > > Grep GET_MODE_PRECISION returns not many results. > > ... misses that GET_MODE_MASK will also return the correct value for > fractional integer modes. This macro has quite a few occurrences in > combine and elsewhere. Thanks for letting me know this. Since only our target experiences such issue, I guess no other processors have such requirements of manipulating BImode. I can live with the workaround now. Bingfeng
