On 02/11/2011 02:13 PM, Alexander Monakov wrote: > Could you please clarify a bit: would the modified behavior match what your > target CPU does? The current behavior matches CPUs without lookahead in > instruction dispatch: the first insn goes to the first matching execution > unit (A), the second has to wait.
The CPU I'm working on needs to specify explicitly which unit an insn is using, but to generate optimal code that assignment must be made _after_ scheduling all the insns in a given cycle. Bernd
