On 17/03/2011 18:29, Jeff Law wrote:
> On 03/17/11 12:25, David Daney wrote:
>>> Instruction sequence #1 has been combined into a single equivalent
>>> instruction. Instruction sequence #2 moved. Register usage is also
>>> different but equivalent.
> In my experience, there's all kinds of reasons why this can happen.
>
> Use of floating point within the compiler (we generally avoid it),
> unstable qsort (again, we generally try to avoid it), hashing issues,
> particularly with pointers, etc etc.
In particular, isn't it a known issue that 32-bit hosts and 64-bit hosts can
generate different constant-loading sequences owing to the differing size of
HOST_WIDE_INT?
On 17/03/2011 16:59, McCall, Ronald SIK wrote:
> I am attempting to move an old gcc powerpc-eabi cross toolchain from an old
> Solaris SPARC server to a new Linux x86_64 server.
Was that 32-bit Solaris?
cheers,
DaveK
