The AVR controller basically has two kinds of hard registers:
* LD_REGS (constraint "d") that can move immediates
* NO_LD_REGS (constraint "l") that cannot move immediates
movsi insn of avr backend does not supply an "l,i" constraint
alternative, so that reload takes care of that and allocates an
intermediate SImode d-reg.
The drawback is that this allocates 4 GPRs (AVR is 8-bit machine).
However, one "d"-reg would be sufficient to copy a const into class "l".
So I defined TARGET_SECONDARY_RELOAD to take care of input reloads of
CONST_INT for SImode. The hook return NO_REGS and sets sri->icode to
insn code of an insn similar to old-fashioned input reload pattern.
All this works fine and as expected, but I have some questions:
1) The internals just mention TARGET_SECONDARY_RELOAD for REG-MEM and
for REG-REG moves, no word about REG-CONST moves. So is using
secondary reloads for CONST_INT (or other consts) like outlined
above a defined use case I can rely on?
2) The secondary reload hook is always called with
regclass = GENERAL_REGS, even in cases where the class
is known to be NO_LD_REGS like, e.g. when preparing arguments
for a function call. Why this? I would expect to get the smallest
available regclass. If a reg lies in LD_REGS, a secondary reload
is not needed, but how can I know if class is always GENERAL_REGS?
Is it ensured that secondary reload hook gets never called when
a constraint alternative matches, like "d,i"?
3) What is the "unit" of sri->extra_cost? Compared to COST_N_INSNS?
Or compared to "?" constraint cost?
TARGET_CANNOT_FORCE_CONST_MEM returns always true.
Thanks, Johann
