Hi,
I am having a size optimisation issue with GCC-4.6.1.
The problem boils down to the fact that I have no idea on the best way
to hint to GCC that a given insn would make more sense someplace else.
The C code is simple:
int16_t mask(uint32_t a)
{
return (x & a) == a;
}
int16_t is QImode and uint32_t is HImode.
After combine the insn chain (which is unmodified all the way to ira) is
(in simplified form):
regQI 27 <- regQI AH [a]
regQI 28 <- regQI AL [a+1]
regQI AL <- andQI(regQI 28, memQI(symbolrefQI(x) + 1))
regQI AH <- andQI(regQI 27, memQI(symbolrefQI(x))
regQI 30 <- regQI AL
regQI 29 <- regQI AH
regQI 24 <- 1
if regQI 29 != regQI 27
goto labelref 20
if regQI 30 != regQI 28
goto labelref 20
goto labelref 22
labelref 20
regQI 24 <- 0
labelref 22
regQI AL <- regQI 24
The problem resides in `regQI 24 <- 1' being before the jumps.
Since regQI 24 is going to AL, IRA decides to allocate regQI 24 to AL,
which creates loads of conflicts and reloads. If that same insn would be
moved to after the jumps and before the `goto labelref 22' then all
would be fine cause by then regs 27, 28, 29, 30 are dead.
It's obviously hard to point to a solution but I was wondering if
there's a way to hint to GCC that moving an insn might help the code
issue. Or if I should look into a why an existing pass is not already
doing that.
Cheers,
--
PMatos
