Handong Ye <yehand...@gmail.com> writes:
> Hi, I'm new in gcc, and maybe misunderstand the constraint modifier '+'.
> As the internal document says, '+' means an inout parameter. In my
> mind, it means the instruction both reads and writes the pseudo
> register.
>
> Assuming I have a pattern like:
>
> (define_insn "lssu"
> [(set (match_operand:m1 0 ...)
> (unspec:m1 [ (match_operand:SI 1 "register_operand" "+r")
> (match_operand:SI 2 ...)] UNSPEC_XXX))]
>
> and I have a sequence of code like
>
> (insn 1 .... (set (reg:SI 100) (...)))
> ...
> (insn 10 ... (set (reg:m1 200) (unspec:m1 [(reg:SI 100) (...)]
> UNSPEC_XXX)) 33 {lssu} (nil))
> ...
> (insn 30 ... (set (reg:SI 300) (reg:SI 100)
>
> Can I expect that pseudo reg 100 in insn 30 has the new value written
> by insn 10?
>
> My experiments show that this is not true, and pseudo reg 100 in insn
> 30 still takes the value in insn 1.
> Or maybe something else is wrong in our porting ?
Constraints, like +r, are only used by the register allocator and reload
and friends. They do not mean anything to the RTL optimizers. You
should write your RTL to explicitly set values that are changed.
Ian
