Quoting paul_kon...@dell.com:
I'm running into an ICE due to what looks like wrong register
allocation, and I'm trying to figure out where the problem lies. It
shows up with today's GCC (trunk). I haven't yet tried to narrow
it down to a particular change.
It shows up in the pdp11 target, -O2. Not clear that this is pdp11 specific.
If a match test is confused with an overlap test somehwhere, the incidence
would be influenced by the endianness. The little-endian equivalent
would be (reg:SI 2) versus (reg:HI 3). Except that the latter wouldn't
tend to be created by (misdirected) attempts to tie modes of different sizes.
And of course you have a word size factor here; on a 32 or 64 bit target,
you need larger modes to get multi-hard-register pseudos.
