For a 16 bit CPU the cmpelim pass is changing
(insn 33 84 85 6 (parallel [
(set (reg:HI 1 r1)
(ashift:HI (reg:HI 1 r1)
(const_int 1 [0x1])))
(clobber (reg:CC_NOOV 7 flags))
]) ../gcc/testsuite/gcc.c-torture/execute/960311-3.c:18
33 {ashlhi3}
(insn 34 87 35 6 (set (reg:CC_NOOV 7 flags)
(compare:CC_NOOV (reg:SI 0 r0)
(const_int 0 [0])))
../gcc/testsuite/gcc.c-torture/execute/960311-3.c:20 39
{*comparesi3_nov}
(jump_insn 35 34 36 6 (set (pc)
(if_then_else (ge (reg:CC_NOOV 7 flags)
to
(insn 33 84 85 6 (parallel [
(set (reg:HI 1 r1)
(ashift:HI (reg:HI 1 r1)
(const_int 1 [0x1])))
(set (reg:CC_NOOV 7 flags)
(compare:CC_NOOV (ashift:HI (reg:HI 1 r1)
(const_int 1 [0x1]))
(const_int 0 [0])))
]) ../gcc/testsuite/gcc.c-torture/execute/960311-3.c:18
29 {ashlhi3_cc}
(jump_insn 35 87 36 6 (set (pc)
(if_then_else (ge (reg:CC_NOOV 7 flags)
(reg:HI r1) is a subreg of (reg:SI r0) however the cmpelim seems
to be substituting the compare of (reg:HI r1 and 0) for the
compare of (reg:SI r0 and 0) ?
While I'm here, in i386.md some of the flag setting operations
specify a mode and some don't . Eg
(define_expand "cmp<mode>_1"
[(set (reg:CC FLAGS_REG)
(compare:CC (match_operand:SWI48 0 "nonimmediate_operand")
(define_insn "*add<mode>_3"
[(set (reg FLAGS_REG)
(compare
Can anyone explain the significance of this ?
Thanks, Paul.
