On Thu, Jan 29, 2015 at 07:44:29PM +0100, Richard Biener wrote: > On January 29, 2015 6:25:35 PM CET, Jakub Jelinek <ja...@redhat.com> wrote: > >On Thu, Jan 29, 2015 at 06:19:45PM +0100, Tom de Vries wrote: > >> consider attached patch, which adds pass_lim after fre1 (a > >simplification of > >> my oacc kernels patch series). > >> > >> The included testcase lim-before-stdarg.c fails. > >> > >> The first sign of trouble is in lim-before-stdarg.c.088t.stdarg > >(attached): > >> ... > >> gen_rtvec: va_list escapes 0, needs to save 0 GPR units and 0 FPR > >units. > >> ... > >> > >> Because of the 'need to save 0 GPRs units', at expand no prologue is > >> generated to dump the varargs in registers onto stack. > > > >The stdarg pass can't grok too heavy optimizations, so if at all > >possible, > >don't schedule such passes early, and if you for some reason do, avoid > >optimizing in there the va_list related accesses. I'm afraid that is > >the > >only recommendation I can give here for that. > > The other possibility (Matz has patches for that) is to delay vaarg lowering > currently done by gimplification and combine it with the stdarg pass.
Yeah, that should work too. But stage1 material probably. Jakub