> On Oct 22, 2022, at 2:38 PM, Marc Glisse via Gcc <gcc@gcc.gnu.org> wrote:
>
> On Sat, 22 Oct 2022, Péntek Imre via Gcc wrote:
>
>> https://gcc.gnu.org/backends.html
>>
>> by "Architecture does not have a single condition code register" do you mean
>> it has none or do you mean it has multiple?
>
> Either.
>
> If you look at the examples below, there is a C for riscv, which has 0, and
> one for sparc, which has several.
Also pdp11, which has two: one for floating point, one for integers, and
conditional branches act only on the integer CC register. So the MD has to
describe a "move float CC to integer CC" operation.
GCC supports all these strange things quite nicely -- this is one of several
things that the newer CCmode machinery does well and the old "cc0" stuff
doesn't.
paul
