Lars Johannesen wrote:
The biggest most important need for the simulation part is to redo the
translation system according to the VHDL (could be Verilog) proposal I
made. I will be your mentor if you want. This could be a good SoC
project, and it will have high visibility. It takes gEDA into an area
where it has not yet been.
Sounds really interesting :)
Another place where I need help is with the windows port of gnucap.
I took a look at QUCS and see they have an expedient way to deal with windows.
They say, "Qt® >= 3.1 (and < 4.0.0) by Trolltech® has to be properly installed
including headers, libraries and the moc compiler."
and imply that is what it takes for a Cygwin install. No native windows
version.
So they require substantial installation time and detail. No click-installer.
QUCS works with X11 and a command shell too.
John Griessen
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