Hi, everyone In order to create and simulate a quite complex schema, I've first tried to follow the tutorial (http://www.brorson.com/gEDA/SPICE/intro.html) to create a simple subckt with gschem and simulate it.
The subschema is a simple filter with 1 resistor and 1 capacitor. I've integrated the schema in an upper one with one voltage source and a charge resistor. When I generate the netlist, gnetlist doesn't complains about anything but the generated netlist is incorrect, the subckt is created but with the full schema, not only the subschema : here's my files and the command I used. Could you indicate what's I've do wrong, I've tried all the past day to generate a correct netlist and I can't see what's the problem ? Regards, Ludovic SMADJA Commands : gnetlist -g spice-sdb -o filtre.cir filtre.sch gnetlist -g spice-sdb -o testFiltre.cir testFiltre.sch ************************************************** [EMAIL PROTECTED] test]$ cat filtre.sch v 20071231 1 C 40000 40000 0 0 0 title-B.sym C 46600 46300 1 0 0 resistor-2.sym { T 47000 46650 5 10 0 0 0 0 1 device=RESISTOR T 46800 46600 5 10 1 1 0 0 1 refdes=R1 T 46600 46300 5 10 1 0 0 0 1 value=100k } C 48100 45300 1 90 0 capacitor-1.sym { T 47400 45500 5 10 0 0 90 0 1 device=CAPACITOR T 47600 45500 5 10 1 1 90 0 1 refdes=C1 T 47200 45500 5 10 0 0 90 0 1 symversion=0.1 T 48100 45300 5 10 1 0 0 0 1 value=1Uf } C 44100 47600 1 0 0 spice-subcircuit-LL-1.sym { T 44200 47900 5 10 0 1 0 0 1 device=spice-subcircuit-LL T 44200 48000 5 10 1 1 0 0 1 refdes=A1 T 44200 47700 5 10 1 1 0 0 1 model-name=filtre_model T 44100 47600 5 10 1 0 0 0 1 value=filtre_model } C 46100 46700 1 180 0 spice-subcircuit-IO-1.sym { T 45200 46300 5 10 0 1 180 0 1 device=spice-IO T 45250 46450 5 10 1 1 180 0 1 refdes=P1 T 46100 46700 5 10 1 0 0 0 1 pinseq=1 T 46100 46700 5 10 1 0 0 0 1 pinlabel=IN T 46100 46700 5 10 1 0 0 0 1 value=IN } N 45900 46400 46600 46400 4 N 47900 46400 47900 46200 4 N 47500 46400 48600 46400 4 N 47900 45300 47900 44900 4 N 45900 44900 48700 44900 4 C 46100 45200 1 180 0 spice-subcircuit-IO-1.sym { T 45200 44800 5 10 0 1 180 0 1 device=spice-IO T 45250 44950 5 10 1 1 180 0 1 refdes=P2 T 46100 45200 5 10 1 0 0 0 1 pinseq=2 T 46100 45200 5 10 1 0 0 0 1 pinlabel=GND1 T 46100 45200 5 10 1 0 0 0 1 value=GND1 } C 48400 46100 1 0 0 spice-subcircuit-IO-1.sym { T 49300 46500 5 10 0 1 0 0 1 device=spice-IO T 49250 46350 5 10 1 1 0 0 1 refdes=P3 T 48400 46100 5 10 1 0 0 0 1 pinseq=3 T 48400 46100 5 10 1 0 0 0 1 pinlabel=OUT T 48400 46100 5 10 1 0 0 0 1 value=OUT } C 48500 44600 1 0 0 spice-subcircuit-IO-1.sym { T 49400 45000 5 10 0 1 0 0 1 device=spice-IO T 49350 44850 5 10 1 1 0 0 1 refdes=P4 T 48500 44600 5 10 1 0 0 0 1 pinseq=4 T 48500 44600 5 10 1 0 0 0 1 pinlabel=GND2 T 48500 44600 5 10 1 0 0 0 1 value=GND2 } **************************************************** [EMAIL PROTECTED] test]$ cat filtre.sym v 20071231 1 B 300 300 2800 1200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 3100 1600 9 10 0 0 0 0 1 device=filtre_model T 1700 400 9 10 1 1 0 3 1 refdes=X? T 1700 800 9 10 1 1 0 3 1 Filtre P 0 1100 300 1100 1 0 0 { T 350 1100 9 10 1 1 0 1 1 pinlabel=P1 T 200 1150 5 8 1 1 0 6 1 pinnumber=1 T 200 1150 5 8 0 1 0 6 1 pinseq=1 T 0 1100 5 10 1 0 0 0 1 refdes=IN } P 0 700 300 700 1 0 0 { T 350 700 9 10 1 1 0 1 1 pinlabel=P2 T 200 750 5 8 1 1 0 6 1 pinnumber=2 T 200 750 5 8 0 1 0 6 1 pinseq=2 T 100 700 5 10 1 0 0 0 1 refdes=GND1 } P 3400 1100 3100 1100 1 0 0 { T 3050 1100 9 10 1 1 0 7 1 pinlabel=P3 T 3200 1150 5 8 1 1 0 0 1 pinnumber=3 T 3200 1150 5 8 0 1 0 0 1 pinseq=3 T 3400 1100 5 10 1 0 0 0 1 refdes=OUT } P 3400 700 3100 700 1 0 0 { T 3050 700 9 10 1 1 0 7 1 pinlabel=P4 T 3200 750 5 8 1 1 0 0 1 pinnumber=4 T 3200 750 5 8 0 1 0 0 1 pinseq=4 T 3400 700 5 10 1 0 0 0 1 refdes=GND2 } T 1700 400 8 10 0 1 0 0 1 source=filtre.sch ********************************************** [EMAIL PROTECTED] test]$ cat testFiltre.sch v 20071231 1 C 40000 40000 0 0 0 title-B.sym C 47100 46700 1 0 0 filtre.sym { T 50200 48300 5 10 0 0 0 0 1 device=filtre_model T 48800 47100 5 10 1 1 0 3 1 refdes=X1 T 48100 46500 5 10 1 0 0 0 1 file=filtre.cir T 47100 46700 5 10 1 0 0 0 1 model-name=filtre_model } C 51900 47100 1 90 0 resistor-2.sym { T 51550 47500 5 10 0 0 90 0 1 device=RESISTOR T 51600 47300 5 10 1 1 90 0 1 refdes=RTest } C 46200 47200 1 90 0 voltage-1.sym { T 45700 47300 5 10 0 0 90 0 1 device=VOLTAGE_SOURCE T 45700 47500 5 10 1 1 90 0 1 refdes=V1 } N 46000 48100 47100 48100 4 N 47100 48100 47100 47800 4 N 46000 47200 47100 47200 4 N 47100 47200 47100 47400 4 N 50500 47800 50500 48400 4 N 50500 48400 51800 48400 4 { T 50500 48400 5 10 1 0 0 0 1 netname=test } N 51800 48400 51800 48000 4 N 50500 47400 50500 46800 4 N 50500 46800 51800 46800 4 { T 50500 46800 5 10 1 0 0 0 1 netname=test2 } N 51800 46800 51800 47100 4 *********************************************************** [EMAIL PROTECTED] test]$ cat testFiltre.cir ******************************* * Begin .SUBCKT model * * spice-sdb ver 4.28.2007 * ******************************* .SUBCKT filtre_model *============== Begin SPICE netlist of main design ============ V1 2 1 unknown X1/C1 2 test 1Uf RTest test2 test X1/R1 1 test 100k .ends filtre_model ******************************* -- Ludovic SMADJA
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