On Apr 4, 2009, at 10:25 PM, Ben Jackson wrote: > > Why not just use chipscope? I thought you could get that for free > these days (although admittedly I use Altera mainly for free Signaltap > myself).
I use Chipscope pretty much constantly, both on my day-job designs (Virtex 5) and on personal projects (Spartan 3E). It's a great way to get visibility & control inside the design and I'd recommend it. As far as I'm aware though, it's not free. IIRC, Xilinx provides a free 60-day trial, but to use it beyond that requires about $700 outlay for the permanent license. The hardware library elements to support it are free, but the GUI application is DRMed. There was an open-source (ish) work-alike that got a write-up in Xilinx's X-cell magazine a few years back that used the Xilinx JTAG library elements along with an external JTAG access API, but it's been pulled from all the websites mentioned in the article. It mainly provided register read/write access via JTAG and an external TCL-TK UI. As far as I know there was no internal logic analyzer provided. It probably wouldn't be too tough to duplicate and expand to include that functionality though. Eric _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user