On Mon, 2010-05-31 at 15:14 -0700, Mike Bushroe wrote: > OK, I have the layout. I found that some symbols don't have explicit OR > implicit power connections. Others use VDD and VSS instead of Vcc and > GND. I found where I have moved a component slightly a caused a short > between ground an power. I got all that fixed. But every time I start > to run the power buss, I reach a point where pins are highlighted > green, but the rat lines disappear, and the DRC makes it impossible to ^___ not sure why, perhaps you hit "e" for erase rats?
> run a trace to the pin. I have to keep saving the layout, exiting the > program, and starting over. Even reloading the net list and displaying > the rat lines does not help. This is slowing things down quit a bit. ^___ If you hit "o" for optimize rats, to re-show the rats, does that help? If not... try switching off Settings->"Auto enforce DRC clearance". That will stop the DRC checker getting in the way of routing tracks. If the board isn't confidential, perhaps send it (or a snippet) along with instructions to reproduce the problem, and someone will take a look to see what the problem might be. Best wishes, -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user