On Tuesday 06 April 2004 01:21 pm, Mike Jarabek wrote: > Not quite true, the always block is only evaluated when something on > the sensitivity list changes. In this case, that only happens when > RST changes. When your clock changes the other always block will > fire, depending on the state of the _E signals, your register will be > overwritten.
But it must be true. If RST changes state, then any continuous assignment using RST as an input will also be re-evaluated at that time. So regardless of what happens to the clock, when the RST is asserted, all the continuous assignments for *_E will be re-evaluated, and will become negated. Oh, wait, the _E signals in the example I posted are raw inputs. I see what you're getting at. I forgot that I changed this in a subsequent version of the receiver (the one that uses a Wishbone interface, and does its own, internal address decoding), where the _E signal is now generated internally, and is qualified against both CLK_I and RES_I. > What I meant by the same destination register is that rxmask appears > on the left hand side of an assignement in more than one always block. OK, that helps answer a few of my questions. I'll try to re-arrange the code either tonight or tomorrow. The test benches should all still work the same. > when the gates are generated. Having all the assignments into a > register in one always block makes the final value of the register > absolutely clear to both the designer and the synthesis tool. I'll try changing the code to reflect this when I go to change blocking to non-blocking assignments. -- Samuel A. Falvo II
