----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/793/ -----------------------------------------------------------
Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan Binkert. Summary ------- LSQ: Fix a few issues with the storeset predictor. Two issues are fixed in this patch: 1. The load and store pc passed to the predictor are passed in reverse order. 2. The flag indicating that a barrier is inflight was never cleared when the barrier was squashed instead of committed. This made all load insts dependent on a non-existent barrier in-flight. Diffs ----- src/cpu/o3/commit_impl.hh 82ff928182c5 src/cpu/o3/mem_dep_unit.hh 82ff928182c5 src/cpu/o3/mem_dep_unit_impl.hh 82ff928182c5 Diff: http://reviews.m5sim.org/r/793/diff Testing ------- Thanks, Ali _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
