> On 2011-09-06 10:00:39, Ali Saidi wrote: > > src/arch/mips/isa/decoder.isa, line 570 > > <http://reviews.m5sim.org/r/843/diff/1/?file=14839#file14839line570> > > > > What is the point of this? > > Gabe Black wrote: > Oh, I thought I took this back out. This is to hide the operand name from > the parser since it didn't use to ignore names in strings. It's not needed > any more, but apparently I forgot to refresh my patch. I guess I won't be > able to push this until I get home and get at the current version of the > patch.
Hmm, nope, it looks like I just missed that one. - Gabe ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/843/#review1488 ----------------------------------------------------------- On 2011-09-05 22:34:59, Gabe Black wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/843/ > ----------------------------------------------------------- > > (Updated 2011-09-05 22:34:59) > > > Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and > Nathan Binkert. > > > Summary > ------- > > GCC: Get everything working with gcc 4.6.1. > > And by "everything" I mean all the quick regressions. > > > Diffs > ----- > > src/SConscript 1f95c9a0bb2f > src/arch/alpha/ev5.cc 1f95c9a0bb2f > src/arch/alpha/isa/decoder.isa 1f95c9a0bb2f > src/arch/alpha/isa/mem.isa 1f95c9a0bb2f > src/arch/arm/isa/formats/fp.isa 1f95c9a0bb2f > src/arch/arm/isa/insts/fp.isa 1f95c9a0bb2f > src/arch/arm/isa/insts/m5ops.isa 1f95c9a0bb2f > src/arch/arm/isa/insts/macromem.isa 1f95c9a0bb2f > src/arch/arm/isa/insts/neon.isa 1f95c9a0bb2f > src/arch/arm/isa/templates/mem.isa 1f95c9a0bb2f > src/arch/mips/isa/decoder.isa 1f95c9a0bb2f > src/arch/mips/isa/formats/control.isa 1f95c9a0bb2f > src/arch/mips/isa/formats/mt.isa 1f95c9a0bb2f > src/arch/mips/isa/includes.isa 1f95c9a0bb2f > src/arch/mips/tlb.cc 1f95c9a0bb2f > src/arch/power/isa/formats/mem.isa 1f95c9a0bb2f > src/arch/power/tlb.cc 1f95c9a0bb2f > src/arch/sparc/isa/formats/mem/util.isa 1f95c9a0bb2f > src/arch/x86/isa/microops/base.isa 1f95c9a0bb2f > src/base/inet.cc 1f95c9a0bb2f > src/cpu/base.cc 1f95c9a0bb2f > src/cpu/inorder/cpu.cc 1f95c9a0bb2f > src/cpu/legiontrace.cc 1f95c9a0bb2f > src/cpu/o3/cpu.cc 1f95c9a0bb2f > src/cpu/o3/rename_impl.hh 1f95c9a0bb2f > src/mem/cache/tags/iic.cc 1f95c9a0bb2f > src/mem/ruby/network/orion/Clock.cc 1f95c9a0bb2f > src/mem/ruby/system/PersistentTable.hh 1f95c9a0bb2f > src/mem/ruby/system/PseudoLRUPolicy.hh 1f95c9a0bb2f > src/python/m5/params.py 1f95c9a0bb2f > src/python/swig/pyobject.cc 1f95c9a0bb2f > src/sim/pseudo_inst.hh 1f95c9a0bb2f > > Diff: http://reviews.m5sim.org/r/843/diff > > > Testing > ------- > > > Thanks, > > Gabe > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
