-----------------------------------------------------------
This is an automatically generated e-mail. To reply, visit:
http://reviews.gem5.org/r/1154/#review2569
-----------------------------------------------------------


In concept this is ok, but I don't think it will work for reasons I've 
mentioned inline. Even if it's a really artificial test, you should be sure to 
try out these sorts of things and make sure they do what you expect. There are 
lots of intricacies in the parser that are easy to miss.


src/arch/isa_parser.py
<http://reviews.gem5.org/r/1154/#comment2968>

    What's preventing _numSrcRegs from already including this register? Also, 
there's a mapping between the operand number and this array. If the numbering 
is off because something got skipped, then you'll read the wrong registers.


- Gabe Black


On April 21, 2012, 1:11 p.m., Nilay Vaish wrote:
> 
> -----------------------------------------------------------
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/1154/
> -----------------------------------------------------------
> 
> (Updated April 21, 2012, 1:11 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Description
> -------
> 
> Changeset 8959:c261b42c18bf
> ---------------------------
> ISA Parser: runtime read, write conditions for registers
> This patch allows for operands to make run time decision, whether they
> should be read/written at all.
> 
> 
> Diffs
> -----
> 
>   src/arch/isa_parser.py 0bba1c59b4d1 
> 
> Diff: http://reviews.gem5.org/r/1154/diff/
> 
> 
> Testing
> -------
> 
> 
> Thanks,
> 
> Nilay Vaish
> 
>

_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev

Reply via email to