> On April 21, 2012, 8:08 p.m., Gabe Black wrote: > > src/arch/isa_parser.py, line 525 > > <http://reviews.gem5.org/r/1154/diff/3/?file=26101#file26101line525> > > > > What's preventing _numSrcRegs from already including this register? > > Also, there's a mapping between the operand number and this array. If the > > numbering is off because something got skipped, then you'll read the wrong > > registers.
_numSrcRegs will be set to 0 to begin with. With in the constructor of the microop, its correct value will be arrived depending on how many registers are required to be read. The array itself is being built in the constructor, so I do not expect any register to be missed. - Nilay ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1154/#review2569 ----------------------------------------------------------- On April 21, 2012, 1:11 p.m., Nilay Vaish wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1154/ > ----------------------------------------------------------- > > (Updated April 21, 2012, 1:11 p.m.) > > > Review request for Default. > > > Description > ------- > > Changeset 8959:c261b42c18bf > --------------------------- > ISA Parser: runtime read, write conditions for registers > This patch allows for operands to make run time decision, whether they > should be read/written at all. > > > Diffs > ----- > > src/arch/isa_parser.py 0bba1c59b4d1 > > Diff: http://reviews.gem5.org/r/1154/diff/ > > > Testing > ------- > > > Thanks, > > Nilay Vaish > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
