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(Updated June 21, 2012, 8:16 a.m.) Review request for Default. Description (updated) ------- Changeset 9078:920ca8183398 --------------------------- Bus: Add a notion of layers to the buses This patch moves all flow control, arbitration and state information into a bus layer. The layer is thus responsible for all the state transitions, and for keeping hold of the retry list. Consequently the layer is also responsible for the draining. With this change, the non-coherent and coherent bus are given a single layer to avoid changing any temporal behaviour, but the patch opens up for adding more layers. Diffs (updated) ----- src/mem/bus.hh d8e5ca139d7c src/mem/bus.cc d8e5ca139d7c src/mem/coherent_bus.hh d8e5ca139d7c src/mem/coherent_bus.cc d8e5ca139d7c src/mem/noncoherent_bus.hh d8e5ca139d7c src/mem/noncoherent_bus.cc d8e5ca139d7c Diff: http://reviews.gem5.org/r/1265/diff/ Testing ------- util/regress all passing (disregarding t1000 and eio) Thanks, Andreas Hansson _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
