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Review request for Default. Description ------- Changeset 9514:dbc0f2f7a43c --------------------------- cpu: fix case with o3 cpu blocking and unblocking decode in cycle Fix a case in the O3 CPU where the decode stage blocks and unblocks in a single cycle sending both signals to fetch which causes an assert or worse. The previous check could never work before since the status was set to Blocked before a test for the status being Unblocking was executed. Diffs ----- src/cpu/o3/decode_impl.hh f9e76b1eb79a Diff: http://reviews.gem5.org/r/1661/diff/ Testing ------- Thanks, Ali Saidi _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
