> On July 15, 2013, 3:11 p.m., Ali Saidi wrote: > > Hi Mitch, > > > > Have you run FS code with this change? > > > > Thanks, > > Ali > >
Nope, I haven't run FS in months. All of my current benchmarking infrastructure (simpoints, etc) is built on ARM SE. I'm probably one of the few people who do that. - Mitch ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1805/#review4511 ----------------------------------------------------------- On March 29, 2013, 7:47 p.m., Mitch Hayenga wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1805/ > ----------------------------------------------------------- > > (Updated March 29, 2013, 7:47 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Mark ARM IT (if-then) instructions as nops. > > ARM's IT instructions predicate up to the next 4 instructions on various > condition codes. IT instructions really just send control signals to the > decoder, after decode they do not read or write any registers. Marking them > as nops (along with the other patch that drops nops at decode) saves > execution resources and bandwidth. > > > Diffs > ----- > > src/arch/arm/isa/insts/misc.isa 47591444a7c5 > > Diff: http://reviews.gem5.org/r/1805/diff/ > > > Testing > ------- > > A fast libquantum run. > > > Thanks, > > Mitch Hayenga > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
