changeset c3fd4c020e49 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=c3fd4c020e49
description:
cpu: remove legion tracer
If someone wants to debug with legion again they can restore the
code from the repository, but no need to have it hang around
indefinately.
diffstat:
src/cpu/LegionTrace.py | 36 --
src/cpu/SConscript | 4 -
src/cpu/base.hh | 4 +-
src/cpu/legiontrace.cc | 590 -------------------------------------------
src/cpu/legiontrace.hh | 83 ------
src/cpu/m5legion_interface.h | 83 ------
6 files changed, 3 insertions(+), 797 deletions(-)
diffs (truncated from 837 to 300 lines):
diff -r a0dab21e422f -r c3fd4c020e49 src/cpu/LegionTrace.py
--- a/src/cpu/LegionTrace.py Tue Dec 23 11:51:40 2014 -0600
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,36 +0,0 @@
-# Copyright (c) 2007 The Regents of The University of Michigan
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Authors: Gabe Black
-
-from m5.SimObject import SimObject
-from m5.params import *
-from InstTracer import InstTracer
-
-class LegionTrace(InstTracer):
- type = 'LegionTrace'
- cxx_class = 'Trace::LegionTrace'
- cxx_header = "cpu/legiontrace.hh"
diff -r a0dab21e422f -r c3fd4c020e49 src/cpu/SConscript
--- a/src/cpu/SConscript Tue Dec 23 11:51:40 2014 -0600
+++ b/src/cpu/SConscript Sun Jan 25 07:22:05 2015 -0500
@@ -64,10 +64,6 @@
Source('thread_state.cc')
Source('timing_expr.cc')
-if env['TARGET_ISA'] == 'sparc':
- SimObject('LegionTrace.py')
- Source('legiontrace.cc')
-
SimObject('DummyChecker.py')
SimObject('StaticInstFlags.py')
Source('checker/cpu.cc')
diff -r a0dab21e422f -r c3fd4c020e49 src/cpu/base.hh
--- a/src/cpu/base.hh Tue Dec 23 11:51:40 2014 -0600
+++ b/src/cpu/base.hh Sun Jan 25 07:22:05 2015 -0500
@@ -109,8 +109,10 @@
{
protected:
- // @todo remove me after debugging with legion done
+ /// Instruction count used for SPARC misc register
+ /// @todo unify this with the counters that cpus individually keep
Tick instCnt;
+
// every cpu has an id, put it in the base cpu
// Set at initialization, only time a cpuId might change is during a
// takeover (which should be done from within the BaseCPU anyway,
diff -r a0dab21e422f -r c3fd4c020e49 src/cpu/legiontrace.cc
--- a/src/cpu/legiontrace.cc Tue Dec 23 11:51:40 2014 -0600
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,590 +0,0 @@
-/*
- * Copyright (c) 2001-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Steve Reinhardt
- * Lisa Hsu
- * Nathan Binkert
- * Steve Raasch
- */
-
-#include "config/the_isa.hh"
-#if THE_ISA != SPARC_ISA
- #error Legion tracing only works with SPARC simulations!
-#endif
-
-#include <sys/ipc.h>
-#include <sys/shm.h>
-
-#include <cstdio>
-#include <iomanip>
-
-#include "arch/sparc/decoder.hh"
-#include "arch/sparc/registers.hh"
-#include "arch/sparc/utility.hh"
-#include "arch/tlb.hh"
-#include "base/socket.hh"
-#include "cpu/base.hh"
-#include "cpu/legiontrace.hh"
-#include "cpu/static_inst.hh"
-#include "cpu/thread_context.hh"
-#include "sim/full_system.hh"
-#include "sim/system.hh"
-
-//XXX This is temporary
-#include "cpu/m5legion_interface.h"
-
-using namespace std;
-using namespace TheISA;
-
-static int diffcount = 0;
-static bool wasMicro = false;
-
-namespace Trace {
-SharedData *shared_data = NULL;
-
-void
-setupSharedData()
-{
- int shmfd = shmget('M' << 24 | getuid(), sizeof(SharedData), 0777);
- if (shmfd < 0)
- fatal("Couldn't get shared memory fd. Is Legion running?");
-
- shared_data = (SharedData*)shmat(shmfd, NULL, SHM_RND);
- if (shared_data == (SharedData*)-1)
- fatal("Couldn't allocate shared memory");
-
- if (shared_data->flags != OWN_M5)
- fatal("Shared memory has invalid owner");
-
- if (shared_data->version != VERSION)
- fatal("Shared Data is wrong version! M5: %d Legion: %d", VERSION,
- shared_data->version);
-
- // step legion forward one cycle so we can get register values
- shared_data->flags = OWN_LEGION;
-}
-
-////////////////////////////////////////////////////////////////////////
-//
-// Utility methods for pretty printing a report about a difference
-//
-
-inline char * genCenteredLabel(int length, char * buffer, const char * label)
-{
- int labelLength = strlen(label);
- assert(labelLength <= length);
- int leftPad = (length - labelLength) / 2;
- int rightPad = length - leftPad - labelLength;
- char format[64];
- sprintf(format, "%%%ds%%s%%%ds", leftPad, rightPad);
- sprintf(buffer, format, "", label, "");
- return buffer;
-}
-
-inline void printRegPair(ostream & os, char const * title, uint64_t a,
uint64_t b)
-{
- ccprintf(os, " %16s | %#018x %s %#-018x \n",
- title, a, (a == b) ? "|" : "X", b);
-}
-
-inline void printColumnLabels(ostream & os)
-{
- static char * regLabel = genCenteredLabel(16, new char[17], "Register");
- static char * m5Label = genCenteredLabel(18, new char[18], "M5");
- static char * legionLabel = genCenteredLabel(18, new char[18], "Legion");
- ccprintf(os, " %s | %s | %s \n", regLabel, m5Label, legionLabel);
- ccprintf(os,
"--------------------+-----------------------+-----------------------\n");
-}
-
-inline void printSectionHeader(ostream & os, const char * name)
-{
- char sectionString[70];
- genCenteredLabel(69, sectionString, name);
- ccprintf(os,
"====================================================================\n");
- ccprintf(os, "%69s\n", sectionString);
- ccprintf(os,
"====================================================================\n");
-}
-
-inline void printLevelHeader(ostream & os, int level)
-{
- char sectionString[70];
- char levelName[70];
- sprintf(levelName, "Trap stack level %d", level);
- genCenteredLabel(69, sectionString, levelName);
- ccprintf(os,
"====================================================================\n");
- ccprintf(os, "%69s\n", sectionString);
- ccprintf(os,
"====================================================================\n");
-}
-
-void
-Trace::LegionTraceRecord::dump()
-{
- ostream &outs = Trace::output();
-
- // Compare
- bool compared = false;
- bool diffPC = false;
- bool diffCC = false;
- bool diffInst = false;
- bool diffIntRegs = false;
- bool diffFpRegs = false;
- bool diffTpc = false;
- bool diffTnpc = false;
- bool diffTstate = false;
- bool diffTt = false;
- bool diffTba M5_VAR_USED = false;
- bool diffHpstate = false;
- bool diffHtstate = false;
- bool diffHtba = false;
- bool diffPstate = false;
- bool diffY = false;
- bool diffFsr = false;
- bool diffCcr = false;
- bool diffTl = false;
- bool diffGl = false;
- bool diffAsi = false;
- bool diffPil = false;
- bool diffCwp = false;
- bool diffCansave = false;
- bool diffCanrestore = false;
- bool diffOtherwin = false;
- bool diffCleanwin = false;
- bool diffTlb = false;
- Addr m5Pc, lgnPc;
-
- if (!shared_data)
- setupSharedData();
-
- // We took a trap on a micro-op...
- if (wasMicro && !staticInst->isMicroop())
- {
- // let's skip comparing this tick
- while (!compared)
- if (shared_data->flags == OWN_M5) {
- shared_data->flags = OWN_LEGION;
- compared = true;
- }
- compared = false;
- wasMicro = false;
- }
-
- if (staticInst->isLastMicroop())
- wasMicro = false;
- else if (staticInst->isMicroop())
- wasMicro = true;
-
-
- if(!staticInst->isMicroop() || staticInst->isLastMicroop()) {
- while (!compared) {
- if (shared_data->flags == OWN_M5) {
- m5Pc = pc.instAddr() & SparcISA::PAddrImplMask;
- if (bits(shared_data->pstate,3,3)) {
- m5Pc &= mask(32);
- }
- lgnPc = shared_data->pc & SparcISA::PAddrImplMask;
- if (lgnPc != m5Pc)
- diffPC = true;
-
- if (shared_data->cycle_count !=
- thread->getCpuPtr()->instCount())
- diffCC = true;
-
- if (shared_data->instruction !=
- (SparcISA::MachInst)staticInst->machInst) {
- diffInst = true;
- }
- // assume we have %g0 working correctly
- for (int i = 1; i < TheISA::NumIntArchRegs; i++) {
- if (thread->readIntReg(i) != shared_data->intregs[i]) {
- diffIntRegs = true;
- }
- }
- for (int i = 0; i < TheISA::NumFloatRegs/2; i++) {
- if (thread->readFloatRegBits(i*2) !=
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