Hi Steve, We are in the process of creating a “non-coherent” LastLevelCache, and I think there will be some major refactoring in the next few months. In short, I’d suggest to keep the BaseCache for now.
Andreas From: Steve Reinhardt <[email protected]<mailto:[email protected]>> Date: Thursday, 30 April 2015 14:07 To: Default <[email protected]<mailto:[email protected]>>, Andreas Hansson <[email protected]<mailto:[email protected]>> Subject: Re: Review Request 2711: mem: Remove templates in cache model Looking over this patch one last time, another question occurred to me: are there plans to merge the BaseCache and Cache classes? The former was only used to factor out common code that did not need to be templated. Steve On Thu, Apr 30, 2015 at 5:56 AM, Steve Reinhardt <[email protected]<mailto:[email protected]>> wrote: This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2711/ On April 29th, 2015, 3:43 p.m. PDT, Steve Reinhardt wrote: Thanks! Wouldn't it make sense to move the CacheBlkVisitor base class to cache.hh too? Whether you make that change or not, go ahead and ship it... no need for another reviewboard round-trip. On April 30th, 2015, 12:35 a.m. PDT, Andreas Hansson wrote: I left it there since forEachBlk in the CacheBlk needs to be aware of it. I see... since tags/base.hh includes cache/blk.hh but not cache/cache.hh, right? Makes sense now, but not obvious :). - Steve On April 29th, 2015, 2:13 p.m. PDT, Andreas Hansson wrote: Review request for Default. By Andreas Hansson. Updated April 29, 2015, 2:13 p.m. Repository: gem5 Description Changeset 10805:b0ddc3bf1211 --------------------------- mem: Remove templates in cache model This patch changes the cache implementation to rely on virtual methods rather than using the replacement policy as a template argument. There is no impact on the simulation performance, and overall the changes make it easier to modify (and subclass) the cache and/or replacement policy. Diffs * src/mem/cache/base.cc (df2aa91dba5b) * src/mem/cache/blk.hh (df2aa91dba5b) * src/mem/cache/cache.hh (df2aa91dba5b) * src/mem/cache/cache.cc (df2aa91dba5b) * src/mem/cache/tags/random_repl.cc (df2aa91dba5b) * src/mem/cache/tags/base_set_assoc.hh (df2aa91dba5b) * src/mem/cache/tags/base_set_assoc.cc (df2aa91dba5b) * src/mem/cache/tags/fa_lru.hh (df2aa91dba5b) * src/mem/cache/tags/fa_lru.cc (df2aa91dba5b) * src/mem/cache/tags/lru.hh (df2aa91dba5b) * src/mem/cache/tags/lru.cc (df2aa91dba5b) * src/mem/cache/tags/random_repl.hh (df2aa91dba5b) * src/mem/cache/cache_impl.hh (df2aa91dba5b) * src/mem/cache/tags/base.hh (df2aa91dba5b) View Diff<http://reviews.gem5.org/r/2711/diff/> -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2557590 ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2548782 _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
