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Review request for Default. Repository: gem5 Description ------- Changeset 10838:2dd0278fd3b1 --------------------------- cpu: implements vector registers This patch aims at adding vector registers type. The type is defined as a std::array of some fixed number of uint64_ts. The isa_parser.py has been modified to parse vector register operands and generate the required code. Different cpus have vector register files now. The x86 isa files have been modified so that x86 can have instructions with vector operands. Diffs ----- src/arch/SConscript 9b424e7adac5 src/arch/alpha/registers.hh 9b424e7adac5 src/arch/arm/registers.hh 9b424e7adac5 src/arch/isa_parser.py 9b424e7adac5 src/arch/mips/registers.hh 9b424e7adac5 src/arch/null/registers.hh 9b424e7adac5 src/arch/power/registers.hh 9b424e7adac5 src/arch/sparc/registers.hh 9b424e7adac5 src/arch/x86/insts/static_inst.hh 9b424e7adac5 src/arch/x86/insts/static_inst.cc 9b424e7adac5 src/arch/x86/isa.hh 9b424e7adac5 src/arch/x86/isa/microasm.isa 9b424e7adac5 src/arch/x86/isa/operands.isa 9b424e7adac5 src/arch/x86/memhelpers.hh 9b424e7adac5 src/arch/x86/nativetrace.hh 9b424e7adac5 src/arch/x86/nativetrace.cc 9b424e7adac5 src/arch/x86/registers.hh 9b424e7adac5 src/arch/x86/regs/vector.hh PRE-CREATION src/arch/x86/x86_traits.hh 9b424e7adac5 src/cpu/StaticInstFlags.py 9b424e7adac5 src/cpu/base_dyn_inst.hh 9b424e7adac5 src/cpu/checker/cpu.hh 9b424e7adac5 src/cpu/checker/cpu_impl.hh 9b424e7adac5 src/cpu/exec_context.hh 9b424e7adac5 src/cpu/o3/O3CPU.py 9b424e7adac5 src/cpu/o3/cpu.hh 9b424e7adac5 src/cpu/o3/cpu.cc 9b424e7adac5 src/cpu/o3/dyn_inst.hh 9b424e7adac5 src/cpu/o3/free_list.hh 9b424e7adac5 src/cpu/o3/regfile.hh 9b424e7adac5 src/cpu/o3/regfile.cc 9b424e7adac5 src/cpu/o3/rename_map.hh 9b424e7adac5 src/cpu/reg_class.hh 9b424e7adac5 src/cpu/simple/base.hh 9b424e7adac5 src/cpu/simple_thread.hh 9b424e7adac5 src/cpu/static_inst.hh 9b424e7adac5 src/sim/insttracer.hh 9b424e7adac5 Diff: http://reviews.gem5.org/r/2828/diff/ Testing ------- Thanks, Nilay Vaish _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
