> On Nov. 23, 2016, 3:17 p.m., Jason Lowe-Power wrote: > > src/cpu/pred/BranchPredictor.py, line 100 > > <http://reviews.gem5.org/r/3743/diff/2/?file=63759#file63759line100> > > > > Comment is now wrong. > > > > Also, does it make more sense to call this histBufferEntries (or > > histBufferBits) and make the default 2**21? (or would it be 2**21*8? <-- > > this is the confusion.) > > > > I think it would be more clear to use bits or entries, personally. But > > if the branch predictor papers usually talk about the history buffer in > > terms of bytes instead of bits, I guess the current version makes more > > sense.
This big buffer is just a software structure and it does not represent a hardware one. It is just done like this to simplify the management of the branch history and avoid copying those bits too often. The modeled hardware history is implemented as a sliding window on this big buffer. - Nathanael ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3743/#review9160 ----------------------------------------------------------- On Nov. 23, 2016, 2:52 p.m., Arthur Perais wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3743/ > ----------------------------------------------------------- > > (Updated Nov. 23, 2016, 2:52 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 11707:1d085f66c4ca > --------------------------- > > cpu: implement an L-TAGE branch predictor > > This patch implements an L-TAGE predictor, based on André Seznec's code > available from > CBP-2 > (http://hpca23.cse.tamu.edu/taco/camino/cbp2/cbp-src/realistic-seznec.h). The > patch also changes the default branch predictor of o3 from the tournament > predictor > to L-TAGE. > > This patch requires patch #3727 (http://reviews.gem5.org/r/3727/) to compile. > > > Diffs > ----- > > src/cpu/pred/BranchPredictor.py 1d085f66c4ca > src/cpu/pred/SConscript 1d085f66c4ca > src/cpu/pred/ltage.hh PRE-CREATION > src/cpu/pred/ltage.cc PRE-CREATION > > Diff: http://reviews.gem5.org/r/3743/diff/ > > > Testing > ------- > > > Thanks, > > Arthur Perais > > _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
