Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/9041
Change subject: x86: Replace the .serializing directive
with .serialize_(before|after).
......................................................................
x86: Replace the .serializing directive with .serialize_(before|after).
This makes it explicit which type of serialization you want, and also
makes it possible to make a macroop serialize before. The old
serializing directive was renamed .serialize_after in the microcode
assembler, and throughout the microcode implementation, and its
behavior is unchanged. More specifically, it still marks the last
microop within the macroop as IsSerializing and IsSerializeAfter.
The new .serialize_before directive does something similar and marks
the first microop as IsSerializing and IsSerializeBefore.
Change-Id: Ia53466c734c651c65400809de7ef903c4a6c3e7e
---
M
src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py
M src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
M src/arch/x86/isa/insts/system/invlpg.py
M src/arch/x86/isa/insts/system/msrs.py
M src/arch/x86/isa/insts/system/segmentation.py
M src/arch/x86/isa/macroop.isa
6 files changed, 39 insertions(+), 29 deletions(-)
diff --git
a/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py
b/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py
index 70cbd10..0047080 100644
---
a/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py
+++
b/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py
@@ -37,12 +37,12 @@
microcode = '''
def macroop IRET_REAL {
- .serializing
+ .serialize_after
panic "Real mode iret isn't implemented!"
};
def macroop IRET_PROT {
- .serializing
+ .serialize_after
.adjust_env oszIn64Override
# Check for a nested task. This isn't supported at the moment.
diff --git a/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
b/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
index 75a20ff..13d2f18 100644
--- a/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
+++ b/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
@@ -174,19 +174,19 @@
};
def macroop MOV_C_R {
- .serializing
+ .serialize_after
.adjust_env maxOsz
wrcr reg, regm
};
def macroop MOV_R_C {
- .serializing
+ .serialize_after
.adjust_env maxOsz
rdcr reg, regm
};
def macroop MOV_D_R {
- .serializing
+ .serialize_after
.adjust_env maxOsz
wrdr reg, regm
};
diff --git a/src/arch/x86/isa/insts/system/invlpg.py
b/src/arch/x86/isa/insts/system/invlpg.py
index 6d7292d..404c76c 100644
--- a/src/arch/x86/isa/insts/system/invlpg.py
+++ b/src/arch/x86/isa/insts/system/invlpg.py
@@ -40,12 +40,12 @@
microcode = '''
def macroop INVLPG_M {
- .serializing
+ .serialize_after
tia seg, sib, disp
};
def macroop INVLPG_P {
- .serializing
+ .serialize_after
rdip t7
tia seg, riprel, disp
};
diff --git a/src/arch/x86/isa/insts/system/msrs.py
b/src/arch/x86/isa/insts/system/msrs.py
index d0e2675..16d158a 100644
--- a/src/arch/x86/isa/insts/system/msrs.py
+++ b/src/arch/x86/isa/insts/system/msrs.py
@@ -50,7 +50,7 @@
def macroop WRMSR
{
- .serializing
+ .serialize_after
mov t2, t2, rax, dataSize=4
slli t3, rdx, 32, dataSize=8
or t2, t2, t3, dataSize=8
diff --git a/src/arch/x86/isa/insts/system/segmentation.py
b/src/arch/x86/isa/insts/system/segmentation.py
index 3c86481..cbaf945 100644
--- a/src/arch/x86/isa/insts/system/segmentation.py
+++ b/src/arch/x86/isa/insts/system/segmentation.py
@@ -39,7 +39,7 @@
microcode = '''
def macroop LGDT_M
{
- .serializing
+ .serialize_after
.adjust_env maxOsz
# Get the limit
@@ -52,7 +52,7 @@
def macroop LGDT_P
{
- .serializing
+ .serialize_after
.adjust_env maxOsz
rdip t7
@@ -71,7 +71,7 @@
def macroop LGDT_16_M
{
- .serializing
+ .serialize_after
.adjust_env maxOsz
# Get the limit
@@ -85,7 +85,7 @@
def macroop LGDT_16_P
{
- .serializing
+ .serialize_after
.adjust_env maxOsz
rdip t7
@@ -100,7 +100,7 @@
def macroop LIDT_M
{
- .serializing
+ .serialize_after
.adjust_env maxOsz
# Get the limit
@@ -113,7 +113,7 @@
def macroop LIDT_P
{
- .serializing
+ .serialize_after
.adjust_env maxOsz
rdip t7
@@ -132,7 +132,7 @@
def macroop LIDT_16_M
{
- .serializing
+ .serialize_after
.adjust_env maxOsz
# Get the limit
@@ -146,7 +146,7 @@
def macroop LIDT_16_P
{
- .serializing
+ .serialize_after
.adjust_env maxOsz
rdip t7
@@ -161,7 +161,7 @@
def macroop LTR_R
{
- .serializing
+ .serialize_after
chks reg, t0, TRCheck
limm t4, 0, dataSize=8
srli t4, reg, 3, dataSize=2
@@ -178,7 +178,7 @@
def macroop LTR_M
{
- .serializing
+ .serialize_after
ld t5, seg, sib, disp, dataSize=2
chks t5, t0, TRCheck
limm t4, 0, dataSize=8
@@ -196,7 +196,7 @@
def macroop LTR_P
{
- .serializing
+ .serialize_after
rdip t7
ld t5, seg, riprel, disp, dataSize=2
chks t5, t0, TRCheck
@@ -215,7 +215,7 @@
def macroop LLDT_R
{
- .serializing
+ .serialize_after
chks reg, t0, InGDTCheck, flags=(EZF,)
br label("end"), flags=(CEZF,)
limm t4, 0, dataSize=8
@@ -232,7 +232,7 @@
def macroop LLDT_M
{
- .serializing
+ .serialize_after
ld t5, seg, sib, disp, dataSize=2
chks t5, t0, InGDTCheck, flags=(EZF,)
br label("end"), flags=(CEZF,)
@@ -250,7 +250,7 @@
def macroop LLDT_P
{
- .serializing
+ .serialize_after
rdip t7
ld t5, seg, riprel, disp, dataSize=2
chks t5, t0, InGDTCheck, flags=(EZF,)
diff --git a/src/arch/x86/isa/macroop.isa b/src/arch/x86/isa/macroop.isa
index 3a1a84a..33e559c 100644
--- a/src/arch/x86/isa/macroop.isa
+++ b/src/arch/x86/isa/macroop.isa
@@ -144,8 +144,10 @@
self.adjust_imm += val
def adjustDisp(self, val):
self.adjust_disp += val
- def serializing(self):
- self.serializing = True
+ def serializeBefore(self):
+ self.serialize_before = True
+ def serializeAfter(self):
+ self.serialize_after = True
def function_call(self):
self.function_call = True
@@ -158,7 +160,8 @@
"adjust_env" : self.setAdjustEnv,
"adjust_imm" : self.adjustImm,
"adjust_disp" : self.adjustDisp,
- "serializing" : self.serializing,
+ "serialize_before" : self.serializeBefore,
+ "serialize_after" : self.serializeAfter,
"function_call" : self.function_call,
"function_return" : self.function_return
}
@@ -175,7 +178,8 @@
//This is to pacify gcc in case the displacement isn't
used.
adjustedDisp = adjustedDisp;
'''
- self.serializing = False
+ self.serialize_before = False
+ self.serialize_after = False
self.function_call = False
self.function_return = False
@@ -206,10 +210,17 @@
micropc = 0
for op in self.microops:
flags = ["IsMicroop"]
+ if micropc == 0:
+ flags.append("IsFirstMicroop")
+
+ if self.serialize_before:
+ flags.append("IsSerializing")
+ flags.append("IsSerializeBefore")
+
if micropc == numMicroops - 1:
flags.append("IsLastMicroop")
- if self.serializing:
+ if self.serialize_after:
flags.append("IsSerializing")
flags.append("IsSerializeAfter")
@@ -219,8 +230,7 @@
flags.append("IsReturn")
else:
flags.append("IsDelayedCommit")
- if micropc == 0:
- flags.append("IsFirstMicroop")
+
allocMicroops += \
"microops[%d] = %s;\n" % \
(micropc, op.getAllocator(flags))
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Ia53466c734c651c65400809de7ef903c4a6c3e7e
Gerrit-Change-Number: 9041
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <gabebl...@google.com>
Gerrit-MessageType: newchange
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