[gem5-dev] Change in gem5/gem5[develop]: arch, arch-arm: Use BaseISA in RenameMode interface

[Bobby R. Bruce (Gerrit)]

Bobby R. Bruce has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/25429 )

Change subject: arch, arch-arm: Use BaseISA in RenameMode interface
......................................................................
arch, arch-arm: Use BaseISA in RenameMode interface

Please note: we are still templatizing the RenameMode class to avoid
virtual methods

Change-Id: I4afd99f45eaa45be9e032b67e106884a21c83234
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25429
Reviewed-by: Gabe Black <gabebl...@google.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/arch/arm/isa.hh
M src/arch/generic/traits.hh
2 files changed, 9 insertions(+), 6 deletions(-)

Approvals:
  Gabe Black: Looks good to me, approved
  Giacomo Travaglini: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index e6173cf..14ccb5c 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -776,9 +776,11 @@
 struct RenameMode<ArmISA::ISA>
 {
     static Enums::VecRegRenameMode
-    init(const ArmISA::ISA* isa)
+    init(const BaseISA* isa)
     {
-        return isa->vecRegRenameMode();
+        auto arm_isa = dynamic_cast<const ArmISA::ISA *>(isa);
+        assert(arm_isa);
+        return arm_isa->vecRegRenameMode();
     }

     static Enums::VecRegRenameMode
@@ -792,7 +794,7 @@
     }

     static bool
-    equalsInit(const ArmISA::ISA* isa1, const ArmISA::ISA* isa2)
+    equalsInit(const BaseISA* isa1, const BaseISA* isa2)
     {
         return init(isa1) == init(isa2);
     }
diff --git a/src/arch/generic/traits.hh b/src/arch/generic/traits.hh
index c10fbcc..5363419 100644
--- a/src/arch/generic/traits.hh
+++ b/src/arch/generic/traits.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016 ARM Limited
+ * Copyright (c) 2016, 2020 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -40,6 +40,7 @@
 #ifndef __ARCH_COMMON_TRAITS_HH__
 #define __ARCH_COMMON_TRAITS_HH__

+#include "arch/generic/isa.hh"
 #include "arch/types.hh"
 #include "enums/VecRegRenameMode.hh"

@@ -51,7 +52,7 @@
 template <typename ISA>
 struct RenameMode
 {
-    static Enums::VecRegRenameMode init(const ISA*) { return Enums::Full; }
+    static Enums::VecRegRenameMode init(const BaseISA*) { return  
Enums::Full; }

     static Enums::VecRegRenameMode
     mode(const TheISA::PCState&)
@@ -61,7 +62,7 @@
      * Compare the initial rename mode of two instances of the ISA.
      * Result is true by definition, as the default mode is Full.
      * */
-    static bool equalsInit(const ISA*, const ISA*) { return true; }
+    static bool equalsInit(const BaseISA*, const BaseISA*) { return true; }
 };

 #endif /* __ARCH_COMMON_TRAITS_HH__ */

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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I4afd99f45eaa45be9e032b67e106884a21c83234
Gerrit-Change-Number: 25429
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Bobby R. Bruce <bbr...@ucdavis.edu>
Gerrit-Reviewer: Gabe Black <gabebl...@google.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Jason Lowe-Power <ja...@lowepower.com>
Gerrit-Reviewer: Nikos Nikoleris <nikos.nikole...@arm.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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