See <https://jenkins.gem5.org/job/Nightly/62/display/redirect?page=changes>
Changes: [giacomo.travaglini] cpu: Add HTM ExecContext API [giacomo.travaglini] cpu: Add HTM ThreadContext API [giacomo.travaglini] sim: Add HTM Generic Fault [giacomo.travaglini] cpu: Base dyn inst HTM flags getter [giacomo.travaglini] mem: Add HTM fields to the Packet object [giacomo.travaglini] mem-ruby: HTM mem implementation [giacomo.travaglini] cpu: HTM Implementation for TimingCPU [giacomo.travaglini] cpu: HTM Implementation for O3CPU [Bobby R. Bruce] tests,arch-sparc: Move SPARC insttests to long [hoanguyen] base: Tag API methods and variables in bitfield.hh [hoanguyen] base: Tag API methods in coroutine.hh [hoanguyen] base: Tag API methods and variables in fiber.hh [hoanguyen] base: Tag API methods and macros in logger.hh [hoanguyen] base: Tag API methods and variables in chunk_generator.hh [hoanguyen] base: Tag API methods and variables to circular_queue.hh [Andreas.Sandberg] base, sim: Make ByteOrder into a ScopedEnum accessible to Python [hoanguyen] base: Tag API methods and variables in random.hh [hoanguyen] base: Tag API methods in amo.hh [hoanguyen] base: Tag API methods and variables in addr_range_map.hh [hoanguyen] base: Tag API methods and variables in channel_addr.hh [hoanguyen] base: Tag API methods in socket.hh [hoanguyen] base: Tag API methods and variables in trie.hh [hoanguyen] base: Tag API methods and variables in bitunion.hh [hoanguyen] base: Tag API methods and variables in callback.hh [hoanguyen] base: Tag API methods and variables in addr_range.hh [hoanguyen] base: Tag API methods in pollevent.hh [hoanguyen] base: Tag API methods in stl_helpers.hh [hoanguyen] base: Tag API methods in remote_gdb.hh [hoanguyen] base: Tag API methods to trace.hh [hoanguyen] base: Tag API methods in condcodes.hh [hoanguyen] base: Tag API methods in sat_counter.hh [hoanguyen] base: Tag API methods in intmath.hh [hoanguyen] base: Tag API variables in version.cc [hoanguyen] base: Tag API methods in flags.hh [hoanguyen] base: Tag API variables in date.cc [hoanguyen] base: Tag API methods in inet.hh [hoanguyen] base: Tag API methods to debug.hh [hoanguyen] base: Tag API methods in crc.hh [hoanguyen] ext: Make the testing-results folder visible [Jason Lowe-Power] mem: Factor out DRAM interface [Jason Lowe-Power] mem: Make MemCtrl a ClockedObject [Jason Lowe-Power] mem: Add NVM interface [Jason Lowe-Power] mem: Clean up Memory Controller [Jason Lowe-Power] cpu: convert memtest to new style stats [hoanguyen] ext: Force testlib to only create one Log object [hoanguyen] ext: Add post_test_procedure to testlib runner [hoanguyen] ext,tests: Copy test's output files from /tmp to testing-results [Jason Lowe-Power] cpu-o3: convert elastic trace to new style stats [Jason Lowe-Power] cpu: convert trace cpu to new style stats [gabeblack] arm: Replicate the PageBytes constant in the ArmSystem class. [gabeblack] dev,arm: Use the ArmSystem::PageBytes constant in the generic timer. [srikant.bharadwaj] mem-ruby: Check number of vnets when creating links [hoanguyen] base,misc: Add group definitions for newly tagged API in src/base [Bobby R. Bruce] arch-arm: Transactional Memory Extension (TME) [gabeblack] arm: Remove "using namespace ArmISA" from arch/arm/isa_traits.hh. [Jason Lowe-Power] cpu-minor: convert fetch2 to new style stats ------------------------------------------ [...truncated 243.79 KB...] [ CXX] ARM/sim/tags.cc -> .o [ CXX] ARM/sim/cxx_config.cc -> .o [ TRACING] -> ARM/debug/CxxConfig.hh [ CXX] ARM/sim/cxx_manager.cc -> .o [ CXX] ARM/sim/cxx_config_ini.cc -> .o [ CXX] ARM/sim/debug.cc -> .o [ LINK] -> ARM/mem/ruby/structures/lib.o.partial [ CXX] ARM/sim/py_interact.cc -> .o [ CXX] ARM/sim/eventq.cc -> .o [ CXX] ARM/sim/futex_map.cc -> .o [ CXX] ARM/sim/global_event.cc -> .o [ CXX] ARM/sim/init.cc -> .o [ CXX] ARM/sim/init_signals.cc -> .o [ TRACING] -> ARM/debug/Loader.hh [ CXX] ARM/sim/kernel_workload.cc -> .o [ CXX] ARM/sim/port.cc -> .o [ CXX] ARM/sim/python.cc -> .o [ CXX] ARM/sim/redirect_path.cc -> .o [ TRACING] -> ARM/debug/TimeSync.hh [ CXX] ARM/sim/root.cc -> .o [ CXX] ARM/sim/serialize.cc -> .o [ CXX] ARM/sim/drain.cc -> .o [ CXX] ARM/sim/sim_events.cc -> .o [ CXX] ARM/sim/sim_object.cc -> .o [ CXX] ARM/sim/sub_system.cc -> .o [ CXX] ARM/sim/ticked_object.cc -> .o [ CXX] ARM/sim/simulate.cc -> .o [ CXX] ARM/sim/stat_control.cc -> .o [ CXX] ARM/sim/stat_register.cc -> .o [ TRACING] -> ARM/debug/ClockDomain.hh [ CXX] ARM/sim/clock_domain.cc -> .o [ TRACING] -> ARM/debug/VoltageDomain.hh [ CXX] ARM/sim/voltage_domain.cc -> .o [ CXX] ARM/sim/se_signal.cc -> .o [ CXX] ARM/sim/linear_solver.cc -> .o [GENERATE] arm -> ARM/arch/remote_gdb.hh [CONFIG H] USE_KVM, 0 -> ARM/config/use_kvm.hh [ TRACING] -> ARM/debug/WorkItems.hh [CONFIG H] HAVE_PERF_ATTR_EXCLUDE_HOST, 1 -> ARM/config/have_perf_attr_exclude_host.hh [ CXX] ARM/sim/system.cc -> .o [ CXX] ARM/sim/dvfs_handler.cc -> .o [ CXX] ARM/sim/clocked_object.cc -> .o [ CXX] ARM/sim/mathexpr.cc -> .o [ TRACING] -> ARM/debug/PowerDomain.hh [ CXX] ARM/sim/power_state.cc -> .o [ CXX] ARM/sim/power_domain.cc -> .o [ TRACING] -> ARM/debug/Fault.hh [ CXX] ARM/sim/faults.cc -> .o [ CXX] ARM/sim/process.cc -> .o [ CXX] ARM/sim/fd_array.cc -> .o [ CXX] ARM/sim/fd_entry.cc -> .o [ TRACING] -> ARM/debug/SyscallBase.hh [ TRACING] -> ARM/debug/SyscallVerbose.hh [ CXX] ARM/sim/mem_state.cc -> .o [GENERATE] arm -> ARM/arch/pseudo_inst.hh [ TRACING] -> ARM/debug/PseudoInst.hh [ CXX] ARM/sim/pseudo_inst.cc -> .o [ CXX] ARM/sim/syscall_emul.cc -> .o [ CXX] ARM/sim/syscall_desc.cc -> .o [ CXX] ARM/sim/vma.cc -> .o [ TRACING] -> ARM/debug/Branch.hh [ CXX] ARM/cpu/pred/bpred_unit.cc -> .o [ CXX] ARM/cpu/pred/2bit_local.cc -> .o [ CXX] ARM/cpu/pred/btb.cc -> .o [ LINK] -> ARM/sim/lib.o.partial [ TRACING] -> ARM/debug/Indirect.hh [ CXX] ARM/cpu/pred/simple_indirect.cc -> .o [ CXX] ARM/cpu/pred/indirect.cc -> .o [ CXX] ARM/cpu/pred/ras.cc -> .o [ CXX] ARM/cpu/pred/tournament.cc -> .o [ CXX] ARM/cpu/pred/bi_mode.cc -> .o [ TRACING] -> ARM/debug/Tage.hh [ CXX] ARM/cpu/pred/tage_base.cc -> .o [ CXX] ARM/cpu/pred/tage.cc -> .o [ TRACING] -> ARM/debug/LTage.hh [ CXX] ARM/cpu/pred/loop_predictor.cc -> .o [ CXX] ARM/cpu/pred/ltage.cc -> .o [ CXX] ARM/cpu/pred/multiperspective_perceptron.cc -> .o [ CXX] ARM/cpu/pred/multiperspective_perceptron_8KB.cc -> .o [ CXX] ARM/cpu/pred/multiperspective_perceptron_64KB.cc -> .o [ CXX] ARM/cpu/pred/multiperspective_perceptron_tage.cc -> .o [ CXX] ARM/cpu/pred/multiperspective_perceptron_tage_8KB.cc -> .o [ CXX] ARM/cpu/pred/multiperspective_perceptron_tage_64KB.cc -> .o [ CXX] ARM/cpu/pred/statistical_corrector.cc -> .o [ TRACING] -> ARM/debug/TageSCL.hh [ CXX] ARM/cpu/pred/tage_sc_l.cc -> .o [ CXX] ARM/cpu/pred/tage_sc_l_8KB.cc -> .o [ CXX] ARM/cpu/pred/tage_sc_l_64KB.cc -> .o [ CXX] ARM/arch/arm/decoder.cc -> .o [ TRACING] -> ARM/debug/Faults.hh [ CXX] ARM/arch/arm/faults.cc -> .o [ CXX] ARM/arch/arm/htm.cc -> .o [ LINK] -> ARM/cpu/pred/lib.o.partial [ CXX] ARM/arch/arm/insts/branch.cc -> .o [ CXX] ARM/arch/arm/insts/branch64.cc -> .o [ CXX] ARM/arch/arm/insts/data64.cc -> .o [ CXX] ARM/arch/arm/insts/macromem.cc -> .o In file included from build/ARM/arch/arm/insts/mem64.hh:41, from build/ARM/arch/arm/generated/decoder-g.hh.inc:17, from build/ARM/arch/arm/generated/decoder.hh:8, from build/ARM/arch/arm/insts/macromem.cc:45: build/ARM/arch/arm/insts/misc64.hh:238:1: error: expected class-name before '{' token 238 | { | ^ build/ARM/arch/arm/insts/misc64.hh:240:5: error: 'IntRegIndex' does not name a type; did you mean 'RegIndex'? 240 | IntRegIndex dest; | ^~~~~~~~~~~ | RegIndex build/ARM/arch/arm/insts/misc64.hh:242:31: error: 'ExtMachInst' has not been declared 242 | RegNone(const char *mnem, ExtMachInst _machInst, | ^~~~~~~~~~~ build/ARM/arch/arm/insts/misc64.hh:243:41: error: 'IntRegIndex' has not been declared 243 | OpClass __opClass, IntRegIndex _dest) : | ^~~~~~~~~~~ build/ARM/arch/arm/insts/misc64.hh: In constructor 'RegNone::RegNone(const char*, int, Enums::OpClass, int)': build/ARM/arch/arm/insts/misc64.hh:244:9: error: class 'RegNone' does not have any field named 'ArmStaticInst' 244 | ArmStaticInst(mnem, _machInst, __opClass), | ^~~~~~~~~~~~~ build/ARM/arch/arm/insts/misc64.hh:245:9: error: class 'RegNone' does not have any field named 'dest' 245 | dest(_dest) | ^~~~ In file included from build/ARM/arch/arm/generated/decoder-g.hh.inc:27, from build/ARM/arch/arm/generated/decoder.hh:8, from build/ARM/arch/arm/insts/macromem.cc:45: build/ARM/arch/arm/insts/tme64.hh: At global scope: build/ARM/arch/arm/insts/tme64.hh:48:1: error: expected class-name before '{' token 48 | { | ^ build/ARM/arch/arm/insts/tme64.hh:50:34: error: 'ExtMachInst' has not been declared 50 | MicroTmeOp(const char *mnem, ExtMachInst machInst, OpClass __opClass) : | ^~~~~~~~~~~ build/ARM/arch/arm/insts/tme64.hh: In constructor 'ArmISAInst::MicroTmeOp::MicroTmeOp(const char*, int, Enums::OpClass)': build/ARM/arch/arm/insts/tme64.hh:51:16: error: class 'ArmISAInst::MicroTmeOp' does not have any field named 'MicroOp' 51 | MicroOp(mnem, machInst, __opClass) | ^~~~~~~ build/ARM/arch/arm/insts/tme64.hh: At global scope: build/ARM/arch/arm/insts/tme64.hh:58:39: error: 'ExtMachInst' has not been declared 58 | MicroTmeBasic64(const char *mnem, ExtMachInst machInst, | ^~~~~~~~~~~ build/ARM/arch/arm/insts/tme64.hh:68:1: error: expected class-name before '{' token 68 | { | ^ build/ARM/arch/arm/insts/tme64.hh:72:34: error: 'ExtMachInst' has not been declared 72 | TmeImmOp64(const char *mnem, ExtMachInst machInst, | ^~~~~~~~~~~ build/ARM/arch/arm/insts/tme64.hh: In constructor 'ArmISAInst::TmeImmOp64::TmeImmOp64(const char*, int, Enums::OpClass, uint64_t)': build/ARM/arch/arm/insts/tme64.hh:74:18: error: class 'ArmISAInst::TmeImmOp64' does not have any field named 'ArmStaticInst' 74 | ArmStaticInst(mnem, machInst, __opClass), | ^~~~~~~~~~~~~ build/ARM/arch/arm/insts/tme64.hh: At global scope: build/ARM/arch/arm/insts/tme64.hh:83:1: error: expected class-name before '{' token 83 | { | ^ build/ARM/arch/arm/insts/tme64.hh:85:5: error: 'IntRegIndex' does not name a type; did you mean 'RegIndex'? 85 | IntRegIndex dest; | ^~~~~~~~~~~ | RegIndex build/ARM/arch/arm/insts/tme64.hh:87:36: error: 'ExtMachInst' has not been declared 87 | TmeRegNone64(const char *mnem, ExtMachInst machInst, | ^~~~~~~~~~~ build/ARM/arch/arm/insts/tme64.hh:88:37: error: 'IntRegIndex' has not been declared 88 | OpClass __opClass, IntRegIndex _dest) : | ^~~~~~~~~~~ build/ARM/arch/arm/insts/tme64.hh: In constructor 'ArmISAInst::TmeRegNone64::TmeRegNone64(const char*, int, Enums::OpClass, int)': build/ARM/arch/arm/insts/tme64.hh:89:20: error: class 'ArmISAInst::TmeRegNone64' does not have any field named 'ArmStaticInst' 89 | ArmStaticInst(mnem, machInst, __opClass), | ^~~~~~~~~~~~~ build/ARM/arch/arm/insts/tme64.hh:90:20: error: class 'ArmISAInst::TmeRegNone64' does not have any field named 'dest' 90 | dest(_dest) | ^~~~ build/ARM/arch/arm/insts/tme64.hh: At global scope: build/ARM/arch/arm/insts/tme64.hh:100:25: error: expected ')' before ',' token 100 | Tstart64(ExtMachInst, IntRegIndex); | ~ ^ | ) build/ARM/arch/arm/insts/tme64.hh:110:24: error: expected ')' before ',' token 110 | Ttest64(ExtMachInst, IntRegIndex); | ~ ^ | ) build/ARM/arch/arm/insts/tme64.hh:118:26: error: expected ')' before ',' token 118 | Tcancel64(ExtMachInst, uint64_t); | ~ ^ | ) build/ARM/arch/arm/insts/tme64.hh:128:18: error: unnecessary parentheses in declaration of 'ExtMachInst' [-Werror=parentheses] 128 | MicroTfence64(ExtMachInst); | ^ build/ARM/arch/arm/insts/tme64.hh:128:19: error: field 'ExtMachInst' has incomplete type 'ArmISAInst::MicroTfence64' 128 | MicroTfence64(ExtMachInst); | ^~~~~~~~~~~ build/ARM/arch/arm/insts/tme64.hh:125:7: note: definition of 'class ArmISAInst::MicroTfence64' is not complete until the closing brace 125 | class MicroTfence64 : public MicroTmeBasic64 | ^~~~~~~~~~~~~ build/ARM/arch/arm/insts/tme64.hh:138:19: error: unnecessary parentheses in declaration of 'ExtMachInst' [-Werror=parentheses] 138 | MicroTcommit64(ExtMachInst); | ^ build/ARM/arch/arm/insts/tme64.hh:138:20: error: field 'ExtMachInst' has incomplete type 'ArmISAInst::MicroTcommit64' 138 | MicroTcommit64(ExtMachInst); | ^~~~~~~~~~~ build/ARM/arch/arm/insts/tme64.hh:135:7: note: definition of 'class ArmISAInst::MicroTcommit64' is not complete until the closing brace 135 | class MicroTcommit64 : public MicroTmeBasic64 | ^~~~~~~~~~~~~~ build/ARM/arch/arm/insts/tme64.hh:147:1: error: expected class-name before '{' token 147 | { | ^ build/ARM/arch/arm/insts/tme64.hh:149:34: error: 'ExtMachInst' has not been declared 149 | MacroTmeOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass); | ^~~~~~~~~~~ build/ARM/arch/arm/insts/tme64.hh:155:26: error: expected ')' before '_machInst' 155 | Tcommit64(ExtMachInst _machInst); | ~ ^~~~~~~~~~ | ) [ CXX] ARM/arch/arm/insts/mem.cc -> .o [ CXX] ARM/arch/arm/insts/mem64.cc -> .o [ CXX] ARM/arch/arm/insts/misc.cc -> .o cc1plus: all warnings being treated as errors scons: *** [build/ARM/arch/arm/insts/macromem.o] Error 1 In file included from build/ARM/arch/arm/insts/mem64.hh:41, from build/ARM/arch/arm/insts/mem64.cc:38: build/ARM/arch/arm/insts/misc64.hh:238:1: error: expected class-name before '{' token 238 | { | ^ build/ARM/arch/arm/insts/misc64.hh:240:5: error: 'IntRegIndex' does not name a type; did you mean 'RegIndex'? 240 | IntRegIndex dest; | ^~~~~~~~~~~ | RegIndex build/ARM/arch/arm/insts/misc64.hh:242:31: error: 'ExtMachInst' has not been declared 242 | RegNone(const char *mnem, ExtMachInst _machInst, | ^~~~~~~~~~~ build/ARM/arch/arm/insts/misc64.hh:243:41: error: 'IntRegIndex' has not been declared 243 | OpClass __opClass, IntRegIndex _dest) : | ^~~~~~~~~~~ build/ARM/arch/arm/insts/misc64.hh: In constructor 'RegNone::RegNone(const char*, int, Enums::OpClass, int)': build/ARM/arch/arm/insts/misc64.hh:244:9: error: class 'RegNone' does not have any field named 'ArmStaticInst' 244 | ArmStaticInst(mnem, _machInst, __opClass), | ^~~~~~~~~~~~~ build/ARM/arch/arm/insts/misc64.hh:245:9: error: class 'RegNone' does not have any field named 'dest' 245 | dest(_dest) | ^~~~ scons: *** [build/ARM/arch/arm/insts/mem64.o] Error 1 scons: building terminated because of errors. *** Summary of Warnings *** Warning: Your compiler doesn't support incremental linking and lto at the same time, so lto is being disabled. To force lto on anyway, use the --force-lto option. That will disable partial linking. Warning: Header file <png.h> not found. This host has no libpng library. Disabling support for PNG framebuffers. Build step 'Execute shell' marked build as failure Archiving artifacts _______________________________________________ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s